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Inventra HDLC-FIFO, Single Channel HDLC with FIFO; 9,000 gates, 20Mhz

Inventra HDLCxN, Multi-Channel HDLC Controller; <=58,000 gates, <=25Mhz

Inventra INT-DEINT, Interleaver/Deinterleaver; ~2,500 gates (user parameterised design), size and max clock depends on technology and parameters.

Inventra ISDNBRIM, Basic Rate ISDN S/T Interface Module; 5,000 gates, 15.5MHz

Inventra LILAC2, Scalable Linked List Access Controller; 5,000+ gates (configurable), max clock depends on technology and number of channels.

Inventra M1284H, IEEE 1284 Host Parallel Port; 6,500 gates, 24MHz

Inventra M146818, Real-Time Clock; 2,000 gates, max clock depends on technology

Inventra M16550A, Enhanced UART With FIFO; 11,500 gates, >1.8MHz

Inventra M16550S, Enhanced UART with FIFO and Synchronous CPU I/F; 6,800 gates, >1.8MHz

Inventra M165x50, Enhanced UART with FIFO and IrDA; 9,500 gates, >1.8MHz

Inventra M16C450, UART; 3,150 gates, >1.8MHz

Inventra M6402, Compact UART (M6402 & M8868a compatibe); 750 gates, Clock = 16x data rate

Inventra M765A78, Floppy Disk Controller; 12,000 gates, 10MHz

Inventra M8051, 8-Bit Microcontroller; 9,500 gates, max clock depends on technology

Inventra M8051EW, Fast 8-Bit Microcontroller with On-Chip Debug; 5,000 - 22,000 gates, max clock depends on technology

Inventra M8051W, Fast 8-Bit Microcontroller; 9,500 gates, max clock depends on technology

Inventra M8052, 8-Bit Microcontroller; 10,500 gates, max clock depends on technology

Inventra M82092IDE, IDE Controller, ATA-1; 13,600 gates

Inventra M82365SL, PCMCIA PC Host Interface; 17,000, 4.8 - 8.3 MHz

Inventra M82371IDE, IDE Controller, ATA-4 (UDMA/33); 29,750 gates, 33MHz

Inventra M8237A, 4 Channel DMA Controller; 6,100 gates, max clock depends on technology

Inventra M8251A, USART; 2,200 gates, Clock = 1, 16 or 64x baud rate

Inventra M8254, 3 Channel Counter/Timer; 3,000 gates, max clock depends on technology

Inventra M8255, Parallel Peripheral Interface; 1,000 gates, max clock depends on technology

Inventra M8259A, 8 Channel Interrupt Controller; 1,600 gates, max clock depends on technology

Inventra M82801IDE, IDE Controller, ATA-5 (UDMA/66); 30,000 gates, 66MHz

Inventra M8490, 5380 Compatible SCSI Interface; 1,500 gates, 30-40MHz

Inventra M85230, Enhanced Version of M85C30 Serial Comm. Controller; 17,500 gates, 32MHz

Inventra M85C30, Serial Communications Controller w/FIFOs; 17,500 gates, 32MHz

Inventra MCAN2.0, CAN2.0 Network Controller; 32,000 gates

Inventra MDDS78, Digital Data Separator for Floppy/Tape; 1,300 gates, Clock = 16x bit rate

Inventra MFDC78, PC-AT Floppy Disk Controller; 15,000 gates, 24/48 MHz

Inventra MI2C, I2C Bus Interface; 1,500 gates, 1 or 4 MHz (min)

Inventra MI2Cv2, I2C V2.0 Bus Interface; 1,500 gates, up to 34MHz

Inventra MPCI, 32 Bit 33/66 MHz PCI Peripheral Core
Features

Inventra MPCMCIA1, PCMCIA PC Card Interface; 2,500 gates, 4-16 MHz

Inventra MPM-8051, 8051 Microprocessor Peronality Module; 500 gates, 100MHz+

Inventra MPM-W8051, 8051 Warp Microprocessor Peronality Module; 500 gates, 100MHz+

Inventra MUSBFSFC, USB 1.1 Full-Speed Function Controller; 4500+ gates, 48MHz, User Configurable

Inventra MUSBHSFC, USB 2.0 High/Full Spreed Functin Controller; 11,000 + gates, 30/60 MHz, User Configurable

Inventra MUSBLSFC, USB 1.1 Low-Speed Function Controller; 5000 gates, 6MHz

Inventra NCO, Numerically Controlled Oscillator; 1,000-3,000 gates typical (user parameterised design), size and max clock depends on technology and angular res

Inventra PRSDEC, Programmable Reed-Solomon Decoder; 9,000 - 20,000 gate typical (user parameterised design), size and max clock depends on technology and parame

Inventra PRSENC, Programmable Reed-Solomon Encoder; 2,500 - 6,000 gate typical (user parameterised design), size and max clock depends on technology and paramet

Inventra RRS, Recursive Running Sum/Comb Filter; ~3,000 gates typical (user parameterised design), size and max clock depends on technology and filter order.

Inventra RSDEC, Reed-Solomon Decoder; 9,000 - 20,000 gate typical (user parameterised design), size and max clock depends on technology and parameters.

Inventra RSENC, Reed-Solomon Encoder; 2,500 - 6,000 gate typical (user parameterised design), size and max clock depends on technology and parameters.

Inventra T1-DFRM, T1 Deframer; 2,000 gates, 90MHz

Inventra T1-E1-FRM, T1/E1 Framer; 500 gates, 90MHz

Inventra T1-KIT-R, T1 Framing/Deframing Kit (Re-Ordering Add/Drop); 13,800 gates, 90MHz

Inventra T1-KIT-S, T1 Framing/Deframing Kit (Selective Add/Drop); 8,700 gates, 90MHz

Inventra V42BIS, V.42bis Compression Engine; 15,900 gates, 80MHz

Inventra VC, Voice Codec; 15,000 gates, 3MHz

Inventra X50-RX, X.50 Multiplexing Receiver; 1,250, 50MHz

Inventra X50-TX, X50 Multiplexing Transmitter; 375 gates, 50MHz

Inventra™ M16x50 Enhanced UART with FIFOs & IrDA Support
Features

Inventra™ M8051 8-Bit Microcontroller
Features

Inventra™ MCAN2 CAN 2.0 Network Controller
Features

Inventra™ MPCI32 32bit 33/66MHz PCI Core w/Cardbus support
Features

InvisiPHY
Features

IP Compiler for PCI Express (Hard IP)
Features

IP Compiler for PCI Express x1 (Soft IP)
Features

IP Compiler for PCI Express x4 (Soft IP)
Features

IP Compiler for PCI Express x8 (Soft IP)
Features

IP Core implements the error-correcting coding I.6 LDPC super FEC code code for the ITU-T G.795.1 recommendation
I.6 LDPC Codec

IP PCIe EZDMA2 for Xilinx FPGA
Features

IP PCIe QuickPCIe Expert for Xilinx FPGA
Features

IP PCIe2.0 EZDMA2 for Altera FPGA
Features

IP-CORDIC
Features

IP-DDC-2GSPS
Features

IP-DDC128
Features

IP-DDC4
Features

IP-PSK-DEMOD
Features

IP-TINY-DDS
Features

IPAC - TCP/IP Protocol
Features

IPC-Adec-AHB
Features

IPC-AhbArbiter-AHB
Features

IPC-ApbBridge-AHB
Features

IPC-EBI-AHB
Features

IPC-GPIO-APB
Features

IPC-IntrCtrl-AHB
Features

IPC-ParPort-APB
Features

IPC-PWM-APB
Features

IPC-RTC-APB
Features

IPC-SRAMCtrl-AHB
Features

IPC-TFTLCD-AHB
Features

IPC-Timer-APB
Features

IPC-UART-APB
Features

IPC-Wdog-AHB
Features

IPC9011 IEEE 1588 Boundary, Slave and Master Clock – IP Core
IPC9011
Features

IPR-CE200C
Features

IPSEC (RFC 4303) 1Gbit IP Core
IPSEC-1G
Features

iPVP6446
Features

IPX-DDR2: DDR2 Memory Controller
Features

IPX-MA: Memory Arbiter
Features

IPX-RSA: RSA Public Key cryptography accelerator
Features

IPX-SERDES : Multi Stream Data Serializer / Deserializer core
Features

IPX-UDP: UDP Protocol Manager
Features

IRQ Clock Crosser

IRQ Mapper

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