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Displaying 2001-2100/6931

H.264/MPEG-4 AVC|MVC ENCODER IP
Features

H.264/MPEG-4 AVC|MVC|SVC ELEMENTARY STREAMS
Features

H.264EBH
Features

H.265 / HEVC Decoder IP
H.265 Decoder IP
Features

H.265 / HEVC Encoder IP
H.265 Encoder IP
Features

H009 and WB-194 IP Core for FPGA and ASIC Devices
H009, WB-194
Features

H16450S -- Synchronous UART
Features

H16550S -- UART with FIFOs
Features

H16550S: UART with FIFOs and Synchronous CPU Interface Core
Features

H16750S -- UART with FIFOs, IrDA, and Synchronous CPU Interface Core
Features

H2642RTP -- Hardware RTP Stack for H.264 Stream Encapsulation
Features

Hantro G1 Multi-format Video Decoder IP
Features

Hardened DDR & LPDDR PHY
TSMC 16GL
Features

Hardened DDR & LPDDR PHY
TSMC 55LP
Features

Hardened DDR & LPDDR PHY
TSMC 40G
Features

Hardened DDR & LPDDR PHY
TSMC 65LP
Features

Hardware RTP Stack for H.264 Stream Decapsulation
RTP2H264
Features

Hardware RTP Stack for JPEG Stream Encapsulation
JPEG2RTP
Features

HBM2 Controller Core
Features

HBM3 for controller
dwc_hbm3_controller
Features

HBM3 PHY - TSMC N5 1.2V
dwc_hbm3_phy_tsmc5ff12
Features

HCR_AES Crypto
Features

HCR_DES_TDES
Features

HCS08 8-Bit Processor
Features

HD Fixed IP Cameras
Features

HDL DH MIPI D-PHY RECEIVER IP Core
Features

HDL DH MIPI M-PHY TRANSMITTER IP Core
Features

HDLC & SDLC Protocol Controller Core
HSDLC
Features

HDLC Controller
Features

HDLC Framer
Features

HDLC-CORE-A1 Single Channel HDLC Controller; 49 unidirectional I/O ports, 70.4% utilization of A54SX08A FPGA, 145 S modules, 396 C modules, Post layout performa

HDLC-CORE-B1 Single Channel HDLC Controller; 164/1536 macrocells and 49/294 unidirectional I/O ports of CY39100V676-200MBC CPLD device utilized, 83 MHz with 32b

HDLC-FIFO-B1 Single Channel HDLC Controller with FIFO; Choice of internal or external FIFO, Utilization of 647/1536 macrocells w/internal FIFO or 680/1536 macro

HDLC-FIFOD1 Single Channel HDLC Controller w/FIFO; 3678 Logic Cells and 43 I/Os of 20K600EBC652 PLD device utilized, 50 MHz post layout performance

HDMI 1.3 Receiver
Features

HDMI 1.3a Transmitter IP Core
Features

HDMI 2.0 RX Controller and PHY
OMNIPHY-6000_HDMIRx
Features

HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 12FFC
HDMI 2.0 Rx PHY IP in 12FFC
Features

HDMI 2.0 RX PHY in GlobalFoundries (28nm)
dwc_hdmi20_rx_phy_globalfoundries
Features

HDMI 2.0 RX PHY in TSMC (40nm, 28nm)
dwc_hdmi20_rx_phy_tsmc
Features

HDMI 2.0 Transmitter 6Gbps PHY supporting 4k@60hz

HDMI 2.0 Transmitter Controller with HDCP2.3 supported

HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
HDMI 2.0 Tx PHY IP in 12FFC
Features

HDMI 2.0 TX PHY in GlobalFoundries (28nm)
dwc_hdmi20_tx_phy_globalfoundries
Features

HDMI 2.0 TX PHY in SMIC (28nm)
dwc_hdmi20_tx_phy_smic
Features

HDMI 2.0 TX PHY in TSMC (40nm, 28nm, 16nm, 12nm)
dwc_hdmi20_tx_phy_tsmc
Features

HDMI 2.0 TX PHY in UMC (28nm)
dwc_hdmi20_tx_phy_umc
Features

HDMI 2.0/MHL RX Combo in TSMC (40nm, 28nm)
dwc_hdmi20_mhl_rx_tsmc
Features

HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm)
dwc_hdmi20_mhl_tx_tsmc
Features

HDMI 2.1 Audio PLL in Samsung (16nm, 14nm, 12nm)
dwc_hdmi21_audio_pll_samsung
Features

HDMI 2.1 eARC Tx PHY in Samsung (14nm)
dwc_hdmi21_earc_tx_samsung
Features

HDMI 2.1 eARC Tx PHY in TSMC (16nm, 12nm)
dwc_hdmi21_earc_tx_tsmc
Features

HDMI 2.1 Receiver Controller IP
HDMI Rx Controller IP
Features

HDMI 2.1 Rx PHY Samsung (14nm)
dwc_hdmi21_rx_samsung
Features

HDMI 2.1 Rx PHY TSMC (12nm)
dwc_hdmi21_rx_tsmc
Features

HDMI 2.1 Transmitter 12Gbps PHY supporting 8K@60hz

HDMI 2.1 Transmitter Controller IP
HDMI Tx Controller IP
Features

HDMI 2.1 Transmitter Controller with HDCP2.3 Supported

HDMI PHY
Features

HDMI Tx

HDMI v1.4 Receiver IP Core
Features

HDMI v1.4 Transmitter IP Core
Features

HDMI ver1.3 Receiver IP SLISHDMIR (Link)/SLIPHDMIRC (Phy)

HDMI ver1.3 Transmitter IP SLISHDMIT(Link)/SLIPHDMITC (Phy)

HDMI ver1.3a Transmitter SLI10121A

HDMI ver1.3a Transmitter SLI10131

HDMI ver1.3a Transmitter with IP Converter SLI11131

HDMI VIP
Features

HDMI_RX
Features

HDMI_TX
Features

HDMI® 1.3 Receiver Core
Features

HDMI® 1.3 Transmitter Core
Features

HERON-FPGA
Features

HEVC/H.264 and VP9 Multi format 10bit decoder IP with 4K 60fps
WAVE512
Features

HEVC/H.265 10bit codec IP with 4K 30 or 60fps
WAVE420
Features

HEVC/H.265 10bit decoder IP with 4K 60fps
WAVE510
Features

HEVC/H.265 4Kp120 enhanced frame rate video decoder
CS8150 HEVC/H.265 4Kp120 video decoder
Features

HEVC/H.265 4Kp60 video decoder core for SoC implementation
CS8120 HEVC/H.265 4Kp60 Video Decoder
Features

HEVC/H.265 8Kp60 enhanced resolution video decoder core
CS8160 HEVC/H.265 8Kp60 video decoder
Features

HEVC/H.265 ELEMENTARY STREAMS
Features

HEVC/H.265 ENCODER IP
Features

HEVC/H.265 Main Profile Decoder Core
H265-MP-D
Features

HEVC/H.265, VP9 and AVS2 Multi format 10bit decoder IP with 4K 60fps
WAVE515
Features

High Data Rate Demodulator (HDRM-D)
Features

High frequency Digital to Analog converter for video applications
DAC
Features

High Performance 8051 Compatible CPU Core - V805x
V805x
Features

High performance PCIe-AXI Bridge and/or high channel count DMA
Expresso DMA Bridge Core
Features

High Performance Silicon IP Solutions
Features

High Precision N-Bit Delta-Sigma Analog to Digital Converter
NS2210-15

High Precision N-Bit Delta-Sigma Digital to Analog Converter
NS2212-15

High Resolution 12 Bit Temperature Measurement
SGC24012 JTM
Features

High Speed Iterative Decoder (100 Mbit/sec)
S1000
Features

High Speed JPEG Codec
Features

High-performance ARC HS3x and HS4x processors are optimized for GHz+ operating speeds with minimum area and power consumption
dwc_arc_hs_family
Features

High-Performance DDR3/3L Memory Controller
S3C-DDR40-HPC
Features

High-Performance Mobile Multimedia Processor
BCM2702
Features

High-Speed AES Encryption Cores (RJDCEO/RJDCDO/RJDCED)
Features

High-Speed USB 2.0 PHY
Features

High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES (55nm, 40nm)
dwc_duet_embedded memories_logic libraries_gf
Features

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Displaying 2001-2100/6931