Fully integrated DesignWare IP Lowers Design Risk and Enables Interoperability of USB 3.0-Enabled Products

MOUNTAIN VIEW, Calif., March 31 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its DesignWare® SuperSpeed USB (USB 3.0) Solution including Controller and PHY IP successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification. To achieve certification, the IP must pass protocol, electrical, and interoperability tests for SuperSpeed USB (USB 3.0, 5 Gbps) and Hi-Speed USB (USB 2.0, 480 Mbps). Synopsys created a fully integrated USB 3.0 IP solution, optimizing all speed modes into a single USB 3.0 solution. This unique implementation enables designers to reduce area, pin count and power compared to separate USB 2.0 and SuperSpeed USB-only designs. Furthermore, the integrated DesignWare SuperSpeed USB IP significantly lowers integration risk and effort by not requiring designers to manage two distinct USB 2.0 and USB 3.0 data paths in their system-on-chips (SoCs). Synopsys will be showcasing its certified DesignWare SuperSpeed USB IP solution at the SuperSpeed USB Developer's Conference, Booth #18, in Taipei on April 1-2, 2010.

"Passing certification is important as it demonstrates that the IP meets USB-IF interoperability standards and is compliant to the USB 3.0 specification," said Jeff Ravencraft, president and chairman, USB-IF. "Certification of IP building blocks is an important step in the evolution of SuperSpeed USB technology, it assures designers that the solution interoperates with existing USB products while providing the speed and power benefits that SuperSpeed USB offers."

"As a leading provider of graphics over USB 2.0, it was critical that we select a trusted USB IP provider for the development of our next-generation high-definition over USB 3.0 platform," said Dennis Crespo, executive vice president of marketing, DisplayLink. "We chose Synopsys because of their established track record in delivering proven and compliant USB IP solutions which enables us to reduce the risk of incorporating a new interface into our design and quickly get our differentiated product to the market."

"For the past 15 years, Synopsys has been delivering high-quality USB IP solutions which have been integrated in more than 2000 designs," said John Koeter, vice president of marketing, Solutions Group at Synopsys. "We leveraged our extensive experience in USB 2.0 and high-speed serial interfaces to develop our USB 3.0 IP solution that supports all four transfer speeds defined in the USB 3.0 specification. This gives designers a reliable and low-risk path to silicon-success for their USB 3.0 products."

The DesignWare SuperSpeed USB device controller and PHY IP is based on Synopsys' technology leading Hi-Speed USB products, which have been silicon-proven in thousands of designs and are shipping in volume production. Optimized for low power, the DesignWare SuperSpeed USB device controller is architected to allow designers to maximize battery life by using dual power rails. The DesignWare SuperSpeed USB PHY consists of integrated high-speed digital and analog blocks, PLL and I/O pads, which are delivered as GDSII for advanced foundry processes. This saves designers considerable time, cost and the risk of acquiring and integrating the IP separately. The DesignWare SuperSpeed USB Verification IP has built-in support for the VMM methodology, enabling designers to quickly verify connectivity between integrated IP and the SoC. The Linux drivers and SystemC™ transaction-level models in the DesignWare SuperSpeed USB virtual prototype allow designers to begin software development in parallel with IP integration, months before hardware and FPGA prototypes are ready. This significantly reduces the length of the product design cycle.

Availability

The DesignWare SuperSpeed USB Device, Hub, Host and Dual-Role Device Controllers, virtual prototype and driver IP are available now. The DesignWare SuperSpeed USB PHY IP is available in leading 65-nanometer (nm) and 130-nm process technologies now with support for 28-nm and 40-nm process technologies expected to be available in the second half of 2010. For more information on DesignWare USB IP, please visit: http://www.synopsys.com/usb or follow our blog at http://www.synopsysoc.org/usb-blog.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys' broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols including USB, PCI Express, DDR, SATA, Ethernet, HDMI and MIPI IP including 3G DigRF, CSI-2 and D-PHY. The analog IP family includes Analog-to-Digital Converters, Digital-to-Analog Converters, Audio Codecs, Video Analog Front Ends, Touch Screen Controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual prototype for rapid, pre-silicon development of software. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Forward-Looking Statements

This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected benefits of DesignWare SuperSpeed USB 3.0 Controller and PHY IP and date of availability of support for 28-nm and 40-nm process technologies These statements are based on current expectations and beliefs. Actual results could differ materially from these statements as a result of unforeseen engineering difficulties, uncertainties attendant to any new product offering, and certain statements contained in the section of Synopsys' Annual Report on Form 10-K for the fiscal year ended October 31, 2009, and subsequent forms 10-Q, entitled "Risk Factors."

Synopsys and DesignWare are registered trademarks or trademarks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license.  Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

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