eASIC Appoints ASIC and FPGA Industry Expert Mo Movahed as Vice President of Software Engineering

SANTA CLARA, Calif.—(BUSINESS WIRE)—April 10, 2008— eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced it has appointed Mo Movahed as Vice President of Software Engineering. Movahed will spearhead the development of design tools and methodologies for eASIC's current and next generation silicon products enabling customers to further increase the number of designs per engineer per year. Movahed will report directly to Ronnie Vasishta, eASIC President and CEO.

"Mo brings tremendous knowledge and experience to eASIC at this exciting time of our company's growth," said Vasishta. "Our Nextreme family is gaining tremendous market acceptance, and we will continue to simplify the design flow as we aggressively strive to bring affordable silicon customization to the masses. Mo and his team will play a pivotal role in helping eASIC achieve this mission."

Mo Movahed brings over 24 years of software engineering experience in the ASIC and FPGA industry. Most recently, Mo was Vice President of Engineering at Atrenta, an EDA company, and helped the company to develop and release RTL analysis and verification tools,. Prior to that, Movahed was Vice President of Software Engineering at Lattice Semiconductor, and held senior management positions at Cadence Design Systems and Xerox Corporation.

"I'm thrilled to be part of eASIC and work with such a talented team," said Mo Movahed. "eASIC offers a very unique and innovative solution to address the ASIC market needs. I look forward to helping the company reach its next stage and fully realize its long-term potential."

Movahed holds a Bachelors degree in computer engineering from the University of California, Los Angeles and a Masters degree in electronic engineering from the University of Southern California where he worked towards his PhD.

About eASIC

eASIC is a fabless semiconductor company offering breakthrough zero mask-charge ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer ASICs with no mask-charges and no minimum order quantity,

Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information, please visit www.eASIC.com.

Contact:

For eASIC
Spencer Horowitz, 408-832-9616
Email Contact
http://www.easic.com

Featured Video
Jobs
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise