The eDV9100 is optimized for JPEG and MPEG-4 image processing, and includes a 32-bit RISC processor for system control and OSD. The eDV9100 interfaces directly to CMOS sensors up to 5M pixels, memory cards and TFT/STN LCD displays. The eDV9100 is implemented using eASIC’s proven Nextreme zero mask-charge ASIC architecture. This allows designers to rapidly integrate custom features and quickly create derivative devices to meet changing market requirements.
“eASIC’s unique technology continues to deliver on the promise of affordable mass silicon customization. The eDV9100 fills a market requirement for low cost video processing solutions, allowing designers to efficiently develop end products that require little design effort and hence a quick path to revenue generation,” said Ronnie Vasishta, President and CEO of eASIC. “Designers can also add their own custom features cost effectively, with no mask charges, and receive their new device in a few weeks. This platform is a first of it’s kind in that it is targeted at OEMs, ODMs and ASSP companies.”
eDiVeo is an ideal platform for semiconductor vendors that wish to rapidly proliferate a range of re-branded custom video solutions for the ever-increasing number of MPEG and H.264 video applications. Leading market research firms forecast global MPEG IC demand will reach 1.6 billion units annually by 2011.
Full Reference Design, Device Availability and Pricing
The eDV9100 is available now in a 208 ball BGA package. High volume pricing starts at $4.95 each. Pricing includes license to use device firmware and drivers.
A digital video camcorder reference design (eDVR91) is also available. The eDVR91 is available for $299.
Documentation and data sheet for the eDV9100 and the eDVR91 reference design can be accessed at: http://www.easic.com.
The H.264 high-definition members of the eDiVeo family will sample in 3Q08, and be available in production quantities in 4Q08.
About eASIC
eASIC is a fabless semiconductor company offering breakthrough zero mask-charge ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer ASICs with no mask-charges and no minimum order quantity.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information, please visit www.eASIC.com.
Contact:
for eASIC
Spencer Horowitz, 408-832-9616
spencerh@ieee.org
http://www.easic.com
