Dr. Yang will discuss "Silicon Signoff Challenges for 45nm SoC." Power and noise are key contributors to signoff challenges of 45nm designs. Factors such as dynamic power, leakage current, temperature variation, substrate and package noise all impact the integrity of SoCs and must be analyzed and managed to ensure silicon signoff success. Apache Design Solutions provides offerings which address the key challenges associated with power and noise.
About Apache Design Solutions
Apache is an EDA software supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design--such as power, signal, package / system IO, substrate, and temperature--Apache's silicon signoff platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache's vendor-neutral platform enables designers to adopt any industry-standard physical design flow and is certified by TSMC's 5.0 and 6.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies. For more information, visit www.apache-da.com.
Contact:
Apache Design Solutions Yukari Chin, 650-641-4200 Email Contact or Public Relations for Apache Cayenne Communication Michelle Clancy, 252-940-0981 Email Contact
