Toshiba Selects Synopsys VC Formal Verification Solution

Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs

MOUNTAIN VIEW, Calif., June 15, 2017 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS) today announced that Toshiba has deployed Synopsys' VC Formal solution as their SystemVerilog Assertion (SVA) based formal verification solution. VC Formal delivers the performance and capacity necessary to achieve faster formal convergence on Toshiba's increasingly complex designs. Toshiba leveraged VC Formal's native integration with Synopsys' industry-leading VCS® functional verification solution and Verdi® debug platform to achieve faster coverage closure, more effective root-cause analysis, and earlier verification closure.

"Toshiba has deployed VC Formal as a standard SVA-based formal verification solution for the development of leading-edge automotive devices and storage products," said Kazunari Horikawa, senior manager, Design Technology Development Department, Center for Semiconductor Research & Development, Storage & Electronic Devices Solution Company at Toshiba Corporation. "Toshiba accelerated its deployment for complex SoC designs after our first adoption of VC Formal technology in 2016. The complexity of these designs requires a verification solution that delivers best-in-class performance, capacity and ease-of-use. VC Formal enabled us to meet sign off quality for our SoCs, while reducing time to market. We continue to collaborate with Synopsys for further verification technology enhancements."

Synopsys VC Formal delivers faster property convergence through a set of unique engines and smart engine orchestration.  Its innovative high-capacity word-level data model enables formal apps to run on large SoCs, where traditional formal products fail. VC Formal natively integrates with Verdi to provide a formal debug solution that enables simulation experts to easily leverage formal technologies for faster verification closure. VC Formal delivers accelerated debug by integrating unique Verdi engines, like Temporal Flow View and Active Trace, for automated root cause analysis of formal results. VC Formal also incorporates the robust coverage engines of VCS, allowing SoC teams to easily embed formal into their existing verification environment.

"Synopsys has a long history of successful collaboration with Toshiba on the delivery of verification solutions for advanced SoCs," said Mo Movahed, vice president of R&D in the Synopsys Verification Group. "We collaborated with Toshiba and provided a formal verification solution that integrates into their verification flow and methodology, to improve Toshiba's overall design quality."

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at  www.synopsys.com.

Editorial Contacts: 
Carole Murchison
Synopsys, Inc.
650-584-4632
carolem@synopsys.com

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/toshiba-selects-synopsys-vc-formal-verification-solution-300474314.html

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com

Featured Video
Jobs
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Upcoming Events
Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024
SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024
DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024
SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise