HAPS FPGA-based Prototyping Systems Help More Than 400 Companies Accelerate Time to First Prototype and Avoid Costly Device Re-Spins

Highlights:

• With more than 5,000 units shipped, HAPS prototyping systems are the low-risk choice for accelerating software development, HW/SW integration and system validation
• HAPS hardware integration with ProtoCompiler design automation and debug software speeds time to first prototype from weeks to days
• Modular HAPS hardware architecture scales up to 288 million ASIC gates, enabling validation of individual IP blocks, processor subsystems and complete SoCs
• HAPS systems have been deployed across a range of consumer, wired and wireless communications, industrial and computing/storage applications

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced it has shipped over 5,000 HAPS® FPGA-based prototyping systems to more than 400 companies. These companies have selected HAPS systems to accelerate software development, hardware/software integration and system validation. Prototyping teams seeking the highest performance ASIC prototypes select HAPS systems for the scalable architecture, integrated prototyping software and rich catalog of real world I/O interfaces. 

"For more than four years, we have consistently relied on Synopsys HAPS systems to help us efficiently integrate and verify IP and perform full system validation," said Jinhua Chen, FPGA manager at PixelWorks. "Synopsys provides us the most complete hardware and software prototyping solution in the industry, enabling us to accelerate our design time and reduce schedule risk."

HAPS systems are tightly integrated with Synopsys' ProtoCompiler design automation software with built-in HAPS hardware knowledge that enables designers to generate a multi-FPGA design partition in a matter of minutes while delivering up to 3X faster system performance compared to traditional prototyping flows. HAPS systems with ProtoCompiler support ASIC designs up to 288 million gates by extending the synchronization of system clocks, reset and unified configuration. The combination of HAPS systems and ProtoCompiler prototyping software enables the development of ASIC designs that scale from individual IP blocks to complete SoCs while maintaining system performance.

"Through every generation of HAPS FPGA-based prototyping systems, we have focused on addressing our customers' pain points in the areas of scalability, time to first prototype and performance," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "This significant milestone demonstrates how our customers are benefiting from our HAPS solutions to accelerate their software development, hardware/software integration and validation schedules."

Availability & Resources

The HAPS FPGA-based prototyping systems are available now with capacities up to 288 million ASIC gates.

Learn more about HAPS: http://www.synopsys.com/haps:

• FPGA-based Prototyping Methodology Manual (free eBook): http://www.synopsys.com/FPMM
• FPGA-based Prototyping blog: http://blogs.synopsys.com/breakingthethreelaws

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.

Editorial Contacts:
Tess Cahayag
Synopsys, Inc.
650-584-5446
Email Contact

Stephen Brennan
MCA, Inc.
650-968-8900, ext.114
Email Contact

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SOURCE Synopsys, Inc.