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Videos
-> DesignCon 2011
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"New Verification IP Portal",
Sean O'Kane
ChipEstimate.com
Views: 2892
"Fast Design of High-Q Inductors",
John Dunn
AWR
Views: 3693
"3D HDMI Tx and Rx Demo",
Manmeet Walia
Synopsys
Views: 2698
"New A to Z Board Layout Tools Integration via ODB++",
Sherry Hess
AWR
Views: 6679
"Unannounced FPGA Debug Technology",
Michael, Tom, Joe and Bernie"
InPA Systems
Views: 2835
"Studio Suite Cadence Integration",
Martin Timm
CST
Views: 2128
"New Unified Digital Flow for 28nm Giga-gate/GHz Design",
Rahul Deokar
Cadence
Views: 3513
"IBIS-AMI Modeling Extensions",
Todd Westerhoff
SiSoft
Views: 2580
"DesignCon and ESC Silicon Valley",
David Blaza
UBM Electronics
Views: 3101
"New 3D-IC Design Offering",
Rahul Deokar
Cadence
Views: 3812
"IP Update and Platform Preview",
Stephane Hauradou
PLDA
Views: 2004
"New Chip-Package-System Modeling",
Dian Yang
Apache Design Systems
Views: 2568
"Modeling, Business and Webinars Update",
Leslie Landers
Sigrity
Views: 2480
"2010 Success and Business Update"
EVE
Views: 1594
"ADS 2011 Momentum Update",
Colin Warwick
Agilent EEsof
Views: 5926
"New MIPI M-PHY IP",
Ashraf Takla
Mixel
Views: 3710
"New UVM and Modeling Interface Standards",
Shishpal Rawat
Accellera
Views: 3852
"MultiSim Update",
Natasha Baker
National Instruments
Views: 3362
"EMIStream Update",
Eriko Yamato
NEC
Views: 3617
"10x and 20x Analysis Breakthroughs",
Raul Campossano
Physware
Views: 2001
"New PDN Analysis",
Brad Griffin
Cadence
Views: 2993
"Lightning SI and EMC Analysis",
Griffin Derryberry
Zuken
Views: 2213
"Automatic Layout Generation and Analog PDKs",
John Zuk
Tanner EDA
Views: 2250
"Palladium System Verification", Michael Young
Cadence
Views: 2500
"UVM and Silicon Realization",
Tom Anderson
Cadence
Views: 2515
"New Standards and Interface Technical Committee Update",
Brian Bailey
Accellera
Views: 3759
Total : 26
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Editorial
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