Videos -> General


SuperGuard Library Safety Qualification Suite - Solid Sands
Solid Sands
 		2,276 views
«Prev Next»
Keywords: C++ Compiler Testing, Library Safety Qualification, SuperGuard Suite, Safety-Critical Software, ISO C Language Compliance, Traceability in Software Libraries
Description: The SuperGuard Library Safety Qualification Suite is a requirements-based test suite for the C and C++ standard library with full More »

View SuperGuard Library Safety Qualification Suite - Solid Sands Views: 2275 View SuperTest Compiler Test and Validation Suite - Solid Sands Views: 2533 View IPC 2024 Registration is Now Open! Views: 318

View ECO challenges at advanced nodesAvidan Views: 2080 View True Circuits Presentation at DAC 2019 Views: 498 View True Circuits at DAC 2018, featuring John Maneatis Views: 442

View Intel Unleashed: Engineering the Future (Event Replay) Views: 2067 View Register Today for Simulation World 2021 | April 20 & 21 Views: 1081 View IPC APEX EXPO 2021 is the place to be...from wherever you are! Views: 667

View From Sand to Silicon: The Making of a Microchip | Intel Views: 778 View How Intel Makes Chips: Concept to Customer Views: 759 View IPC APEX EXPO 2020 Views: 558

View Don't Have DAC FOMO, Submit Your Work to the Designer, Embedded Systems or IP Track Views: 890 View PolarFire SoC FPGA Brings Real-Time to Linux Views: 2410 View Deep Learning with VGG16 Neural Network Demo on DesignWare EV6x Vision Processor Views: 1369

View People distance measurement with Tara - Stereo camera Views: 2359 View 5MP AutoFocus HD UVC USB Board Camera Views: 2364 View Point Cloud Demo with Tara - Stereo vision USB 3.0 camera Views: 1994

View Paripath Technology Views: 1778 View ZofzPCB Cross-Section feature Views: 1347 View How to create innovative architecture using VisualSim? Views: 859

View Why do we need system-level design for electronics and embedded systems? Views: 767 View Architectural tricks to maximize memory bandwidth Views: 1937 View Designing a Multimedia SoC using system-level simulation Views: 1104

View OrCad to ZofzPCB Views: 890 View High Level Synthesis Design Space Exploration Views: 922 View SystemC part1 Views: 907

View GSA Panel: IP Integration with ASIC Technology Views: 1344 View DFMStream Overview Views: 886 View Using templates in BluePrint PCB Views: 1107

View Downstream BluePrint Overview Views: 1042 View ZofzPCB: FREE 3D Gerber Viewer. Views: 1727 View Xilinx and Open-Silicon HMC Memory Solution Views: 896

View Introduction to Power Electronics Views: 1114 View SSD & Memory: Why It Matters What You Choose Views: 767 View MemoryMirror* First Body-Controlled Smart Mirror Views: 1226

View EDA Playground Introduction Views: 1825 View Sundar Iyer, CEO Views: 2816 View 10GBASE-KR Electrical Conformance with Virtex®-7 FPGAs Views: 2355

View Introduction to JasperGold Low Power Verification App Views: 2256 View Vivado HLS Technical Introduction Views: 1868 View EMC simulation consumer electronic devices Views: 2154

View iPhone 5S Teardown Round Up Views: 1167 View Combined 3D electromagnetic and spin response simulation of MRI systems Views: 2359 View Using IP/SoC Executable Specifications and Integration with Formal Verification Views: 1613

View Tandem Configuration for 7 Series Views: 1302 View Hardware/Software Cross-Trigger for Embedded Design Views: 1609 View Heterogeneous Multicore Debugging with Xilinx SDK Views: 1791

View Agilent Genesys Filter Synthesis Tools Views: 1672 View Two Reasons Why Auto-Adaptive Equalization is Critical to Transceiver Design Views: 1566 View Multiphysics Approach for a Magnetron and Microwave Oven Design Views: 1681

View Understanding Vivado Plug and Play IP Views: 1625 View Vivado XDC Macro Creation Views: 1971 View Using the Xilinx Power Estimator Views: 1585

View Using Vivado Serial IO Analyzer Views: 2040 View Using Tcl Scripts as Constraint Files in Vivado Views: 2275 View Analyzing Device Resource Statistics in Vivado Views: 1367

View Compilation Units in Vivado Synthesis Views: 1485 View Creating and Analyzing Multi Emitter Environment Test Signals with COTS Equipment Views: 1573 View How to Make Your Existing Designs More Robust Views: 1291

View Breaking the RF Carrier Barrier 0 to 200 in Under a Second Views: 1399 View Advances in Load Pull Simulation Views: 1698 View 4 Steps to Bring Up a CFP2 Optical Module with a Virtex-7 HT FPGA Views: 1855

View TSV and Interposer modeling, design and characterization Views: 1947 View Xilinx UltraScale™ Architecture -- Industry's first ASIC-class All Programmable Architecture Views: 2226 View Genesys Overview Views: 1415

View Intel® Xeon Phi™ coprocessor Views: 2476 View Andrew McAfee: What will future jobs look like? Views: 2066 View Rambus Inventor Profile - Elke DeMulder Views: 1577

View Research@Intel 2013: Intelligent Everything Views: 1536 View Human-Centered Design Views: 1486 View Rambus Inventor Profile - Christophe Chevallier Views: 1428

View Rodney Brooks: Why we will rely on robots Views: 2438 View Research@Intel 2013: Opening Keynote Views: 1642 View 5.23.13 15th Annual Top 10 Tech Trends Views: 1449

View NVIDIA GRID vGPU Technology Unveiled at Citrix Synergy Views: 1576 View Keith Barry: Brain magic Views: 1890 View Nanomaterials: The Science of the Small: Stefan Bon at TEDxWarwick 2013 Views: 2433

View Modeling Next-Generation Applications with Intel® CoFluent™ Studio Views: 2546 View Keller Rinaudo: A mini robot -- powered by your phone Views: 1833 View First Look: Industry's First 20nm FPGA Transceiver Views: 1503

View CR-8000 - Intelligent Engineering Views: 1993 View Introducing Samsung GALAXY S4 Views: 1691 View IESA Vision Summit 2013 Views: 1954

View Accelerating DSP Design Productivity with All Programmable FPGAs and SOCs Views: 1386 View Samsung Unveils Galaxy S4 Views: 1917 View Altera to Build Next-Generation, High-Performance FPGAs on Intel's 14 nm Tri-Gate Technology Views: 1948

View Accelerating DSP Design Productivity with All Programmable FPGAs and SOCs Views: 1298 View VHDL-AMS inverting op-amp design & simulation in ViaDesigner Views: 2941 View Reid Wender, VP Marketing Views: 2267

View Keynote By Dr. Ajoy Bose : SoC Realization – Building a Bridge to New Markets and Renewed Growth Part 1 Views: 2961 View Keynote By Dr. Ajoy Bose : SoC Realization – Building a Bridge to New Markets and Renewed Growth Part 2 Views: 3186 View Keynote speech by Jim Hogan: Making Money from SoC Realization – where are we today? Part 1 Views: 3048

View Keynote speech by Jim Hogan: Making Money from SoC Realization – where are we today? Part 2 Views: 3001 View Marcelo Lubaszewski Views: 2055 View Rick Carlson, Vice President - Sales Views: 1692

View "A World of Semiconductor Solutions Down to 14nm",Bob Durstenfeld Views: 3731 View "Challenges for Digital Timing Sign-off at the 20nm Node", Ruben Molina, Magma Views: 2524 View "ECAD and MCAD Solutions", Manny Marcano, President and CEO Views: 4008

View Pantheon 7: Complex Design Just Got Simpler Views: 1698 View Interview with Aart de Geus Views: 1511 View Dieter Therssen & Jane Judge Views: 1963

View Interview with Tom Pennino: Working with Pat Pistilli Views: 2621 View "Free Mar. 16 Design Education Conference", Ali Iranmanesh Views: 2667 View Interviews with MP Associates Staff Views: 3039

View Interview with Pat Pistilli's Daughters Views: 3950 View NanoCMOS Statistical Variability and Reliability, Dr. Asen Asenov Views: 4168 View EDAC Congratulates Pat Pistilli, 2010 Phil Kaufman Award Recipient Views: 2192

View Why DAC 2010? Views: 3283 View Jim McCanny at Japan EDSFair 2009 Views: 2993 View Mark Gogolewski MEMCON 2009 Keynote Clip Views: 8344

View Exceed Connectivity Solution, Views: 3374 View "Make or Break Year" Views: 8872 View Movie: EDA - Where Electronics Begins Views: 4482

View Preview: EDA - Where Electronics Begins Views: 3619
Total : 115
Featured Video








Submit | More Videos 
Sponsored Videos
Submit | More Videos 
Editorial
Sanjay GangalEDACafe Editorial
by Sanjay Gangal
NVIDIA Unveils Revolutionary Hardware Innovations at CES 2025
More Editorial  
Latest Blog Posts
Sanjay GangalVideo Roundup
by Sanjay Gangal
Intel Foundry Expands Defense Partnerships with New RAMP-C Customers
Sanjay GangalEDACafe Editorial
by Sanjay Gangal
EDA Cafe Industry Predictions 2025 – AllSpice.io
Sanjay GangalIndustry Predictions
by Sanjay Gangal
EDACafe Industry Predictions for 2025 – RISC-V International
Sanjay GangalThe Dominion of Design
by Sanjay Gangal
EDACafe Predictions 2025 – SiFive
More EDA Blogs 
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Submit Resume | Post Jobs | More Jobs 
Upcoming Events
CHIPLET SUMMIT 2025 at Santa Clara Convention Center Santa Clara CA - Jan 21 - 23, 2025
ESD Alliance "Savage on Security” Webinar at United States - Jan 23, 2025
SEMICON Korea 2025 at Hall A, B, C, D, E, GrandBallroom, PLATZ, COEX, Seoul Korea (South) - Feb 19 - 21, 2025
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025
Submit | More Events 



© 2025 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise