Description: There are dozens of occasions where designers need to verify the equivalency of two different circuit descriptions -- confirming low power optimizations were inserted correctly, verifying an algorithmic change or performance optimization in the RTL didn't break the desired functionality, etc. In this seminar Vigyan Singhal, the CEO of formal services provider Oski Technology, shows how a combination of optimized engines and a dedicated input wizard and GUI enables users of Jasper's Sequential Equivalency Checking (SEC) app to verify sequential behavioral equivalency up to 300% faster than trying to manually apply un-optimized formal technologies.
Want to learn more? Contact Jasper via info@jasper-da.com, or Oski Technology via their website http://www.oskitechnology.com/contact « Less |
