Calypto Delivers Industry’s First RTL Power Analyzer Based on Sequential Analysis Technology
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Calypto Delivers Industry’s First RTL Power Analyzer Based on Sequential Analysis Technology

Achieves RTL-Level Power Analysis Results with Gate-Level-Like Accuracy in a Fraction of the Time

SANTA CLARA, Calif. — (BUSINESS WIRE) — August 24, 2009 Calypto® Design Systems Inc. ( www.calypto.com) today announced it has developed the industry’s most accurate register-transfer level (RTL) power analysis capability by applying its patented sequential analysis technology to enable accurate power measurement in its PowerPro® Analyzer tool. The tool performs sequential analysis of the entire design, delivering power measurement results that are significantly more accurate than the decade-old RTL power analysis tools in use today. These obsolete tools are based on combinational analysis which limits the accuracy of switching activity propagation compared to the actual sequential circuit activity. Sequential analysis ensures switching activity propagation estimated by the tool closely correlates with real life circuit activity.

By dramatically improving RTL power analysis accuracy, PowerPro Analyzer will enable designers to finally move away from time-consuming, gate-level power analysis flows. These flows require designers to run complex gate-level simulations in order to provide the power analysis tool with accurate design behavior that emulates real-world functionality. Running those same simulations at the RTL level improves efficiency by 10x, often reducing the overall power analysis task time from days to hours. Moreover, RTL-level simulation is part of the standard simulation regression method used by designers to verify their design. The RTL simulation results can be provided to Calypto’s PowerPro Analyzer without adding to design schedules.

“The inaccuracy of existing RTL power analysis tools has limited their adoption and forced the industry to continue using complex, schedule-extending, gate-level power analysis techniques,” said Tom Sandoval, chief executive officer of Calypto. “Having experienced the benefits of sequential analysis technology for RTL power optimization, our customers have asked us to solve the shortcomings of existing RTL power analysis tools, and we are answering this call by adding power analysis capabilities to PowerPro Analyzer.”

Accurate Analysis Requires Specialized Sequential Analysis, Synthesis Expertise

Calypto’s team includes some of the leading minds in the development of advanced power optimization and synthesis tools, possessing unique and rare expertise in sequential analysis technology. This team has been critical in delivering the key capabilities needed to improve the accuracy of RTL power measurement, including:

About PowerPro Analyzer

Calypto’s PowerPro Analyzer is a powerful graphical visualization tool that provides a complete view of power dissipation in an RTL design. The tool also allows designers to view the optimizations recommended by the company’s PowerPro CG and PowerPro MG (memory gating) products. Power dissipation and optimization data can be provided in the context of RTL source code, schematic display, design hierarchy, and various sortable reports. Calypto’s RTL power analysis capabilities have been integrated into a new version of PowerPro Analyzer, which can be used as a standalone tool for RTL power analysis in SOC design flows.

Pricing and Availability

PowerPro Analyzer with block-level power analysis will be available in October 2009. Chip-level power analysis will be available in February 2010. The tool will be offered for a list price of $50,000.

PowerPro CG and PowerPro MG, the only RTL optimization tools based on sequential analysis, each list for $295,000 and include PowerPro Analyzer. PowerPro CG is an automated clock gating power optimization tool that reduces power by up to 60 percent with little or no impact to timing or area. PowerPro MG is an automated memory power optimization solution that takes advantage of the low-power control options available in today’s on-chip memories to reduce both dynamic and leakage memory power with little or no impact to timing or area.

About Calypto

Founded in 2002, Calypto® Design Systems, Inc. empowers designers to create high-quality, low-power electronic systems by providing best-in-class power optimization and functional verification software, based on its patented sequential analysis technology. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the Cadence Connections program, the IEEE-SA, Synopsys SystemVerilog Catalyst Program, the Mentor Graphics OpenDoor program, Si2 and is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America. Corporate headquarters is located at: 2933 Bunker Hill Lane, Suite 202, Santa Clara, Calif. 95054. Telephone: (408) 850-2300. More information can be found at: www.calypto.com.

Calypto, PowerPro and SLEC are trademarks of Calypto Design Systems Inc. Other products and company names may be trademarks or registered trademarks of their respective companies.



Contact:

Orr & Company for Calypto Design Systems
Diane Orr, 408-358-1617
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