Si2 to Host Low Power Coalition Workshop at DAC 2009

Other Si2-sponsored events at DAC include the “Design for Manufacturability Workshop - DFM Challenges at Sub-45nm Design” on July 27, from 1PM-3PM and the Si2 Member/Guest Meeting on July 27, from 6PM-8PM. Both of these events are also free of charge and open to all.

Links to more specific agendas and registration information can be found here: http://www.si2.org/?page=11

About the Low Power Coalition (LPC)

The Low-Power Coalition (LPC) is delivering enhanced capabilities in low-power Integrated Circuit (IC) design flows in particular relating to specifications of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability. Member companies are: Advanced Micro Devices (NYSE: AMD), ARM (Nasdaq: ARMHY), Atrenta, Cadence Design Systems (Nasdaq: CDNS), Calypto Design Systems, Entasys, Envis, Global Unichip (TAIEX: 3443), IBM (NYSE: IBM), LSI (NYSE: LSI), NXP Semiconductors, Sequence Design, and Virage Logic (Nasdaq: VIRL). For further information on the Low Power Coalition, see http://www.si2.org/?page=726.

About Si2

Si2 is an organization of industry-leading semiconductor, systems, EDA and manufacturing companies focused on improving the way integrated circuits are designed and manufactured in order to speed time-to-market, reduce costs, and meet the challenges of sub-micron design. Si2 is uniquely positioned to enable collaboration through a strong implementation focus driven by its member companies. Si2 focuses on developing practical technology solutions to industry challenges. Si2 represents companies involved in all parts of the silicon supply chain throughout the world.



Contact:

Silicon Integration Initiative
William Bayer, 512-342-2244, ext. 304 (office)



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