FFT and FIR filters are the most widely used algorithms in digital communications and video/imaging systems. The new FIR Filter Compiler enables designers to generate optimal implementations of single or multi-rate filters and also takes advantage of multi-channel applications. Most importantly, the optimized multiplier-less architecture greatly reduces resource usage, boosts performance and eliminates the need for large amounts of hard multipliers typically found in FPGAs today. The FFT core provides optimal implementations for OFDM Wireless systems like LTE & WiMAX. Both IP cores support Nextreme and Nextreme-2 NEW ASICs. For more information on these cores visit www.easic.com/ip.
“Many wireless infrastructure and video/imaging designers that are using FPGAs are desperately looking for ways to significantly reduce cost and power consumption of their systems,” said Jasbinder Bhoot, Vice President of Marketing at eASIC. “This new IP portfolio will make it much simpler and quicker for customers to migrate their expensive and power hungry FPGA-based DSP designs to Nextreme Series NEW ASICs and reduce both power consumption and cost.”
“The DSP market like many others is currently declining. The availability of lower-cost design platforms is a must to help manufacturer’s lower costs and deliver affordable products into the market,” said Will Strauss, President of Forward Concepts. “The addition of these DSP IP cores as part of eASIC’s Nextreme-2 ASIC library will help designers to deliver low cost products faster.”
“We are very pleased to be a part of the eASIC eZ-IP Alliance and make our wireless expertise available to designers hungry to reduce cost and power. Our FIR Compiler is an extremely optimal design and perfectly suited to the eASIC architecture. We are confident that wireless designers will leverage this IP to replace any FPGA style FIR filters they are using,” said Dr Garrey Rice, Head of HDL Design at Steepest Ascent.
About eASIC
eASIC is a fabless semiconductor company offering breakthrough NEW ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information on eASIC please visit www.eASIC.com.
About Steepest Ascent
Steepest Ascent Ltd. is a DSP and communications company based in Glasgow, Scotland, UK. The company has extensive experience providing both consultancy and real solutions within the field of digital communications including standards such as 3G LTE, 3GPP, cdma2000, 802.1x, DVB-T/ DVB-H, Bluetooth and also a number of proprietary communication standards. Key products from Steepest Ascent include professional mobile standard compliant simulation libraries (including 3G LTE) and automatic HDL code generation tools. For more information please visit www.steepestascent.com. Steepest Ascent is a privately held company.
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