| Who: | Apache Design Solutions | |
| What: |
Paper: Analysis of Clock Jitter Using PsiWinder. Authored by Apache Design Solutions' Bhavana Thudi, principle product engineer, Ying-Shiun Li, principle engineer, and Ichiang Lin, director of timing products. |
|
| When: | Thursday, October 5, 2006 at 11:30am. | |
| SAME Conference 2006, Sophia Antipolis, France. | ||
The presentation highlights, Apache’s PsiWinder, a Spiced based timing analysis solution, which analyzes clock jitter in the presence of simultaneous power-grid and signal coupling noise. In addition, the presentation will share the dynamic nature of power grid noise and its impact on timing as designs move to 90nm processes and below. Also highlighted are signal cross talk, simultaneous switching noise and dynamic voltage drop, all of which must be accounted for concurrently with higher operating frequencies and design complexities.
About Apache Design Solutions
Apache is an EDA software supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design -- such as power, signal, package / system IO, substrate, and temperature -- Apache’s silicon signoff platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor-neutral platform enables designers to adopt any industry-standard physical design flow and is certified by TSMC’s 5.0, 6.0, and 7.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies. For more information, visit www.apache-da.com.
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Yukari Ohno, 650-641-4200
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