Imperas releases new RISC-V verification product that changes the fabric of processor DV

RISC-V Summit 2021
The RISC-V Summit and DAC are co-located for 2021, running December 6-8 in San Francisco, CA.
Imperas is a Diamond Sponsor for the RISC-V Summit 2021; more details on all the keynotes, talks and to request a demo are available at this link.


About Imperas
Imperas is the leading provider of RISC-V processor models, hardware design verification solutions, and virtual prototypes for software simulation. Imperas, along with Open Virtual Platforms (OVP), promotes open source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multicore systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website.

For more information about Imperas, please see www.imperas.com. Follow Imperas on LinkedIn, twitter @ImperasSoftware and YouTube.

All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.



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