(2) See the "Use of Non-GAAP Financial Measures" section of this release.
GAAP net sales for the second quarter of fiscal 2022 were a record $1.650 billion, up 26.0% from net sales of $1.310 billion in the prior year's second fiscal quarter.
GAAP net income for the second quarter of fiscal 2022 was $242.0 million, or $0.43 per diluted share, up from GAAP net income of $73.6 million, or $0.14 per diluted share, in the prior year's second fiscal quarter. For the second quarters of fiscal 2022 and fiscal 2021, GAAP net income was significantly adversely impacted by purchase accounting adjustments associated with our acquisitions.
Non-GAAP net income for the second quarter of fiscal 2022 was a record at $605.6 million, or $1.07 per diluted share, up from non-GAAP net income of $416.4 million, or $0.78 per diluted share, in the prior year's second fiscal quarter. For the second quarters of fiscal 2022 and fiscal 2021, our non-GAAP results exclude the effect of share-based compensation, expenses related to our acquisition activities (including intangible asset amortization, severance, and other restructuring costs, and legal and other general and administrative expenses associated with acquisitions including legal fees and expenses for litigation and investigations related to our Microsemi acquisition), professional services associated with certain legal matters, IT security remediation costs, non-cash interest expense on our convertible debentures, and losses on the settlement of debt. For the second quarters of fiscal 2022 and fiscal 2021, our non-GAAP income tax expense is presented based on projected cash taxes for the applicable fiscal year, excluding transition tax payments under the Tax Cuts and Jobs Act. A reconciliation of our non-GAAP and GAAP results is included in this press release.
Microchip announced today that on November 2, 2021, its Board of Directors declared a record quarterly cash dividend on its common stock of 23.2 cents per share, up 6.2% from the cash dividend paid last quarter and up 25.9% from the year ago quarter. The quarterly dividend is payable on December 3, 2021 to stockholders of record on November 19, 2021.
"Our September quarter results continued to be strong, with revenue growing 5.1% sequentially and 26% year-over-year despite ongoing manufacturing capacity constraints," said Ganesh Moorthy, President and Chief Executive Officer. "September quarter revenue, non-GAAP gross margin, non-GAAP operating margin, and non-GAAP EPS were all records. Our September 2021 quarter results have now exceeded our long-term operating model of 65% non-GAAP gross margin and 42% non-GAAP operating margin. We plan to update our long-term business model on November 8, 2021, at our Investor and Analyst Day in New York City."
Mr. Moorthy added, "Business conditions remained exceptionally strong through the September quarter with high levels of bookings and record backlog for product to be shipped over multiple quarters, accentuated by our Preferred Supply Program which continues to be greater than 50% of our aggregate backlog and 100% of our backlog in the most constrained capacity areas. Demand outpaced the capacity improvements we implemented during the September quarter resulting in our unsupported backlog continuing to climb and our lead times stretching out."
Steve Sanghi, Microchip's Executive Chair, said, "Microchip's Board of Directors approved a sequential increase in our dividend of 6.2%, to a record 23.2 cents per share, up from our August dividend of 21.85 cents, on a split-adjusted basis. The dividend announced today also represents a 25.9% year-over-year increase. This continues the path we initiated in February 2021 to commence larger increases in our quarterly dividends, with a sequential increase of 5.8% in February, 5.9% in May, and 5.8% in August. We expect to continue to increase dividends as part of our cash return strategy."
Eric Bjornholt, Microchip's Chief Financial Officer, said, "We continued to aggressively pay down our debt with another $415.6 million of payments during the September quarter, reflecting a cumulative debt pay down of $4.41 billion over the past 13 quarters, as we have actively managed the working capital requirements for the business. In the September quarter, we exchanged $263.6 million of dilutive convertible debentures for cash and shares of common stock. We used cash generation during the quarter to fund the principal amount of the convertible debt exchanges and we believe that these transactions will benefit stockholders by significantly reducing share count dilution to the extent our stock price appreciates over time. We remain focused on enhancing our capital structure as we continue on our path to becoming an investment grade rated company."
Mr. Moorthy concluded, "Our backlog for the December quarter is very strong. In addition, we have considerable backlog requested by customers in the December quarter that currently cannot be fulfilled until later quarters despite us growing capacity from last quarter. Given this backdrop, we expect our net sales in the December quarter to be up between 4% and 8% sequentially. At the mid-point of our guidance for the December quarter, net sales will be 29.3% higher than the year ago quarter."
Microchip's Highlights for the Quarter Ended September 30, 2021:
- Introduced the first aerospace-qualified baseless power modules, the BL1, BL2, and BL3 family developed with the Clean Sky consortium and qualified to stringent aerospace standards for AC-to-DC and DC-to-AC power conversion.
- Announced the next performance milestone for edge compute systems with the low-density PolarFire® devices – mid-bandwidth Field Programmable Gate Arrays (FPGAs) and FPGA System-on-Chips (SoC) consuming half the static power of alternatives while providing the world’s smallest thermal footprint.
- Unveiled the industry’s first commercially available I2C Serial EEPROM with support for 3.4 Mbit/s data rates – the 24CS512 – making it the fastest I2C EEPROM in the world.
- Introduced the first single-chip network synchronization solution providing ultra precise timing for 5G radio access equipment, with its low-power, multi-channel integrated circuit coupled with the company’s IEEE® 1588 Precision Time Protocol (PTP) and clock recovery algorithm software modules.
- Announced the LAN867x family of 10BASE-T1S PHYs, the first to implement the IEEE® 10BASE-T1S single-pair Ethernet technology standard for connecting devices in industrial networks and expanding connectivity to the very edges of industrial networks.
- Introduced the first NVMe and 24G SAS Tri-Mode RAID and HBA storage adapters with its Adaptec® Smart Storage PCIe® Gen 4 NVMe Tri-Mode SmartRAID 3200 RAID Adapters, and Adaptec SmartHBA 2200 and Adaptec HBA 1200 Host Bus Adapters, enabling next-generation connectivity.
- Unveiled the industry’s most compact 1.6T Ethernet PHY with up to 800 GbE connectivity for cloud data centers, 5G and AI, with its PM6200 META-DX2L reducing power per port by 35 percent compared to its 56G PAM4 predecessor.
- Expanded its silicon carbide portfolio with a family of high-efficiency, high-reliability 1700V silicon carbide MOSFET die, discrete and power modules, the industry’s most rugged silicon carbide power solutions that extend designers’ options for efficiency and power density.
- Unveiled the Qi® 1.3 wireless charging reference design, providing developers of wireless charging systems for automotive and consumer applications the necessary tools and support for the seamless integration and certification of new-generation product designs.
- Introduced a new 1200V production-ready digital gate driver to complement its broad portfolio of silicon carbide MOSFET discrete and module products, providing developers multiple levels of control and protection for safe, reliable operation and qualified to stringent transportation requirements.
- Unveiled its new Chip Scale Atomic Clock, the SA65 CSAC, for military and industrial systems featuring ultra-high precision and low power consumption for precise timing accuracy and stability in extreme environments.
- Announced that it joined the Defense Advanced Research Projects Agency (DARPA) Toolbox initiative providing the agency’s researchers open licensing opportunities with commercial technology vendors. Its participation gives DARPA researchers zero-cost access to the company’s Libero® design software suite.
- Announced the addition of an HLS design workflow called SmartHLS to its PolarFire® Field Programmable Gate Array (FPGA) families, enhancing the ease of design by allowing C++ algorithms to be directly translated to FPGA-optimized Register Transfer Level (RTL) code.
Third Quarter Fiscal Year 2022 Outlook:
The following statements are based on current expectations. These statements are forward-looking, and actual results may differ materially.
