Highlights:
- Optimized integration of PLDA CXL 2.0 controller and AnalogX ultra low power PHY reduces latency by over 50% and power by 40% compared to leading competitive solutions
- Improves system performance at no extra cost, while pre-configured integration reduces design time and speeds time-to-market
SAN JOSE, Calif. & TORONTO — (BUSINESS WIRE) — June 2, 2021 — PLDA, the leading developer of high-speed interconnect silicon IP, and AnalogX, the leading provider of low power multi-standard connectivity SerDes IP solutions, today announced an optimized integration of PLDA CXL™ 2.0 controller and AnalogX 32G-MR PHY that reduces latency by 50% and power consumption by 40% compared to leading competitive solutions.
The CXL (Compute Express Link™) standard was developed to scale heterogeneous computing in the data center and provide more efficient data movement for compute-intensive workloads, specifically where latency requirements were not met by existing interface standards. Prior to today, leading CXL controller and PHY combinations had offered latency performances between 20 and 40ns. PLDA and AnalogX are proud to announce that the combination of the PLDA XpressLINK Controller IP for CXL 2.0 and the AnalogX 32G-Multi-Protocol SerDes PHY has been verified to produce a latency of less than 12ns. This industry-leading latency directly improves server performance, allowing devices and data to be accessed quicker with no extra cost or overhead. As part of the implementation, PLDA and AnalogX were able to reduce power consumption by 40% compared to alternative solutions.
According to Paul Karazuba, vice president of marketing of PLDA, “Today’s announcement underscores PLDA’s commitment to providing the highest quality, highest performance controller IP for our customers. We are pleased to have collaborated with AnalogX and look forward to our customers realizing the performance advantages of sub 12ns latency in CXL 2.0.”
Robert Wang, CEO of AnalogX added, “We are pleased with announcing the results of the excellent work of both teams. Our SerDes technology is specifically built for ultra-low power and very low latency applications in demanding Data Center and High Performance Computing applications. This sub 12ns CXL 2.0 solution shows how our solution will help in these markets.”
Solution Availability:
The PLDA XpressLINK Controller IP for CXL 2.0 and the AnalogX 32G-Multi-Protocol PHY are available today for 7nm and 6nm designs.
More Information:
For more information on PLDA’s XpressLINK Controller IP for CXL 2.0, please visit our website at
https://www.plda.com/products/xpresslink-controller-ip-cxl-2011
For more information on AnalogX’s 32G-Multi-Protocol SerDes, please visit our website at: https://www.analogx.io/axlinkio-mp
About PLDA
PLDA is a developer and licensor of semiconductor Intellectual Property (IP) specializing in high-speed interconnects supporting multi-gigabit rates (2.5G, 5G, 8G, 16G, 25G, 32G, 64G) and protocols such as PCI Express, CXL, and CCIX.
PLDA has established itself as a leader in this domain with over 3,300 customer projects and 6,400 licenses in 62 countries. PLDA is a global technology company with offices in Silicon Valley, France, Bulgaria, Taiwan, and China. Visit http://www.plda.com
About AnalogX
AnalogX Inc. develops ultra-low power connectivity IP solutions to connect chips and chiplets. With product available across multiple foundries and technology nodes, AnalogX's mission is to enable high-end, mixed-signal IPs that drive revolutionary SoC designs for high-bandwidth applications that range from AI to Data Center Computing. AnalogX is headquartered in Toronto, Canada. Visit
http://www.analogx.io
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Trademarks
All registered trademarks and other trademarks belong to their respective owners. CXL is a registered trademarks of the CXL Consortium.
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Contact:
Contact Information:
PLDA
Romain Tourneau
rtourneau@plda.com
AnalogX
Kash Johal
kash@analogx.io