- When: 1:20 p.m. – 1:40 p.m. GMT+8
- Who: UltraSoC
TG403: a High-Performance Secure RISC-V Based MCU for Embedded Applications
- When: 1:40 p.m. – 2 p.m. GMT+8
- Who: Tangram
Break
- When: 2 p.m. – 2:30 p.m. GMT+8
Expanding RISC-V Ecosystem for China Adoption 扩展RISC-V生态系统，助力中国市场
- When: 2:30 p.m. – 2:50 p.m. GMT+8
- Who: NXP
Innovation Unleashed: Solutions and Silicon Enabling the Intelligent Edge and Linux
- When: 2:50 p.m. – 3:10 p.m. GMT+8
- Who: SiFive
CKB-VM: a Blockchain Focused, General-Purpose Applicable Software Sandbox System Based on RISC-V
- When: 3:10 p.m. – 3:30 p.m. GMT+8*
- Who: Nervos
Innovation Thrust
- When: 3:30 p.m. – 3:50 p.m. GMT+8*
- Who: UC TECH IP
*Please note, the Nervos and UC TECH IP presentations will only take place at the Hangzhou event.
Each event is admission free, see below to register.
- Shenzhen: May 6 at the Crowne Plaza Landmark Shenzhen – please register here.
- Chengdu: May 8 at the Sheraton Chengdu Lido Hotel – please register here.
- Shanghai: May 13 at the Hyatt on the Bund – please register here.
- Hangzhou: May 14 at the Alibaba – please register here.
- Beijing: May 16 at the Crowne Plaza Zhongguancun – please register here.
To learn more about the RISC-V China Roadshow, please visit: https://www.lfasiallc.com/events/risc-v-china-roadshow-2019/
For press interested in attending and scheduling meetings with the RISC-V Foundation and member companies, please email: risc-v@racepointglobal.com.
To learn more about the RISC-V Foundation, its open, free architecture and membership information, please visit: https://riscv.org.
About RISC-V Foundation
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 235 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.
View source version on businesswire.com: https://www.businesswire.com/news/home/20190422005105/en/
Contact:
Allison DeLeo
Racepoint Global for RISC-V Foundation
Phone: +1
(415) 694-6700
Email:
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