Real Intent Awarded U.S. Patent for Methods and Systems for Correcting X-pessimism in Gate-level Simulation or Emulation
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Real Intent Awarded U.S. Patent for Methods and Systems for Correcting X-pessimism in Gate-level Simulation or Emulation

Company's 7th patent addresses correcting X-pessimism in gate-level verification 

SUNNYVALE, CALIF, USA — June 7, 2018 - Real Intent Inc. has been awarded U.S. patent 9,965,575 for methods and systems for correcting X-pessimism in gate-level simulation or emulation. This 7th patent by Real Intent is directed to its core technology for the functional verification and sign-off of digital logic used in design IP and SoCs. Gate-level netlist simulation treats unknown values ("Xs") pessimistically, producing results which are not the same as actual hardware and inconsistent with RTL simulation. Netlist sign-off is a key milestone prior to tape-out, and X-pessimism-free analysis is a key requirement for this milestone. Achieving accuracy in gate-level simulation is a major impediment to sign-off, which is Real Intent's primary focus.

"The award of this 7th patent demonstrates our technology leadership in digital verification, and our ability to innovate as we deliver best-in-class solutions for key problems like X-pessimism," said Dr. Pranav Ashar, Real Intent's Chief Technology Officer. "Our customers demand that X-pessimism correction be automatic, work on-the-fly, and deliver the scale and efficiency that makes full-chip gate-level analysis truly viable. Real Intent's solution ensures that hardware engineers see only the accurate circuit-behavior in verification, delivered via the fastest analysis that saves months of sign-off effort and gives them a key competitive edge."

About Real Intent

Real Intent is the industry leader in static sign-off of digital designs. Companies worldwide rely on Real Intent's innovative EDA software to accelerate early functional verification and sign-off at RTL and gate-level. Its intent-driven static technology powers solutions for clock and reset domain crossing analysis (CDC, RDC), cleaned-up RTL code, and X-pessimism correction, to ensure design success for SoCs and FPGAs. Real Intent products lead the market in performance, capacity and accuracy, and provide a faster time to tape out. Please visit  www.realintent.com for more information.

Ascent, Meridian and iDebug are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners. 



Contact: 

Barbara Benjamin for Real Intent
HighPointe Communications
503.209.2323
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