Avery Design Systems Announces SimXACT 5.0 for Improved X-Verification
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Avery Design Systems Announces SimXACT 5.0 for Improved X-Verification

TEWKSBURY, Mass. — (BUSINESS WIRE) — February 23, 2018 — Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of release 5.0 of its patented SimXACT analysis solutions including major new features for analyzing and automatically eliminating X bugs in gate-level design simulation.

SimXACT automates the tedious process of analyzing X propagations in gate-level simulations due to RTL vs gate-level mismatches arising from X-optimism problems and gate-level simulator X-pessimism handling in glue logic and gated clocking and overly pessimistic library cell modelling. SimXACT’s hydrid formal analysis runs with your normal logic simulator and proves and then on-the-fly fixes any false Xs arising from X pessimism during the actual simulation run. SimXACT also provides X analysis to debug X bugs from RTL vs gate-level simulation mismatches.

Highlights of the 5.0 release include:

Visit us at the DVCon San Jose during February 26-28.

About Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential backtracing; and robust core-through-chip-level Verification IP for PCI Express, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.



Contact:

Avery Design Systems
Chris Browy, 978-851-3627
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