RISC-V Paper by Imperas at 15th International System-on-Chip (SoC) Conference 2017
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RISC-V Paper by Imperas at 15th International System-on-Chip (SoC) Conference 2017

Imperas Presenting on Accelerated Software Development, Debug and Test for RISC-V Platforms

OXFORD, United Kingdom — (BUSINESS WIRE) — October 3, 2017Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, will participate in the 15th International System-on-Chip (SoC) Conference, with Larry Lapides presenting a paper: “ RISC-V Models and Simulation Enable Early Software Bring Up.”

The 15th International System-on-Chip (SoC) Conference will be held October 18 - 19, 2017 at the University of California, Irvine (UCI) - Calit2. The theme for this year’s conference is “Secure and Intelligent Silicon Systems for Emerging Applications."

Paper: RISC-V Models and Simulation Enable Early Software Bring Up

When: Exhibit and workshops, October 18 - 19, 2017. Paper Wednesday October 18, 2:20 – 2:50PM.

Where: University of California, Irvine, 4100 Calit2 Bldg. #325, Irvine, CA 92697.

To set up meetings with Imperas, please email Email Contact.

For more information on the 15th International System-on-Chip (SoC) Conference, see http://www.socconference.com.

About Imperas

For more information about Imperas, please see www.imperas.com. Follow us on Twitter @ImperasSoftware, on LinkedIn and YouTube.

All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.

 



Contacts:

Imperas Software Ltd.
Larry Lapides, 925-519-1234
Email Contact