Aldec Delivers Efficient Verification with Requirements-based, User-defined Test Plan in Coverage
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Aldec Delivers Efficient Verification with Requirements-based, User-defined Test Plan in Coverage

HENDERSON, Nev. — (BUSINESS WIRE) — November 12, 2014Aldec, Inc., announces the latest release of its mixed-language, advanced verification platform,  Riviera-PRO™ 2014.10. This release of Riviera-PRO delivers speed and efficiency to the verification process by enhancing coverage metrics. Riviera-PRO has long supported UCIS-compatible coverage databases, and the latest release enables a new approach by linking requirements-based, user-defined test plan with coverage metrics.

“Coverage-based verification methodology has been widely used by engineers for some time now, however the complexities of today’s designs require more efficient management of the verification process,” said Satyam Jani, Riviera-PRO Product Manager. “Instead of relying solely on the inspection of coverage results, designers can now link the requirements-based test plan with coverage metrics for a faster and more efficient method of coverage closure.”

Based on design specifications, engineers typically create a test plan to examine the functionality and other properties of the design. These tent plans, often written in Microsoft Excel or similar format, are then converted to XML which Riviera-PRO can now import into Aldec’s coverage database file. This file can later be merged with the coverage database file from other simulation runs, enabling the user to link test plan sections with collected coverage databases and generate reports to validate the verification progress.

The 2014.10 release of Riviera-PRO also includes numerous new features, enhancements, and performance optimizations. For additional information, tutorials, free evaluation download and What’s New Presentation, visit http://www.aldec.com/Products/Riviera-PRO.

About Aldec

Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.



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Aldec, Inc.
Christina Toole, + (702) 990-4400
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