Aldec Webinar: ASIC/SoC Prototyping with Aldec’s New HES-7 Board
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Aldec Webinar: ASIC/SoC Prototyping with Aldec’s New HES-7 Board

 

Webinar:          ASIC/SoC Prototyping with Aldec’s New HES-7 Board

                        Thursday, November 15, 2012

US Session

Time: 11:00am-12:00pm PST

Register for US Session

 

EU Session

Time: 3:00pm-4:00pm CET

Register for European Session

Please visit http://www.aldec.com/events for additional information about this webinar and other upcoming Aldec events.

 

Presenter:      Bill Tomas – Aldec Product Engineer

Abstract:

Aldec's newly released FPGA-based prototyping platform, HES-7™, leverages Xilinx® Virtex®-7 FPGA. Xilinx has introduced a new Stacked Silicon Interconnect technology (SSI), enabling a single Virtex-7 to have 2M logic cells, making it the industry’s largest capacity FPGA. This webinar will provide an overview of modifications to previous Xilinx architecture and the structuring of SSI technology. The webinar will also present how the Virtex-7 benefits FPGA-based prototyping platforms, and will also provide an overview of HES-7 key features.

Agenda:

  • Prototyping Boards, Build or Buy?
  • Today’s FPGA-based prototyping platforms
  • Xilinx® Virtex-7® FPGA
  • Aldec HES-7
  • Key Features  
  • Summary 
  • Q and A