Mentor Graphics Strengthens Its Automotive Solutions with New Integrated AUTOSAR Design Environment

NXP Adopts Mentor Graphics’ Veloce Hardware Emulator to Accelerate Time-to-Market for Their HDTV and Set-Top-Box Chip Sets

Mentor Graphics and Agilent Technologies Win EDN Magazine’s Innovation Award for RF Design Solution

Mentor Graphics Introduces Next-Generation VeSys Electrical Design Software

Mentor Graphics Unveils Advanced Low Power Features in Its Olympus-SoC Place-and-Route Platform

Mentor Graphics Provides Complete 3D Variability Solution Addressing Density and Thickness Challenges

Andrew Baker , CEO Orca Semi

Lou Ternullo, Senior Director of IP Product Management Rambus

Simon Rance, Director of Product Management and Strategic Marketing Keysight Technologies

EDACafe Editorial by Roberto Frazzoli Intel to get $7.86 billion CHIPS Act award; Risc-V-based universal processor; SMIC’s yields; Nvidia’s music generation AI model

EDACafe Editorial by Sanjay Gangal NVIDIA and Industry Leaders Unveil Groundbreaking Real-Time Digital Twin Technology

Siemens EDA by Sanjay Gangal Enhance power reliability through design-stage layout optimization

Bridging the Frontier by Bob Smith, Executive Director Happy Thanksgiving from the ESD Alliance, a SEMI Technology Community!

Industry Predictions by Sanjay Gangal Intel’s New Xeon 6 SoC Redefines vRAN Efficiency, Single-Server Footprint for Cell Sites

Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California

Design Verification Engineer for Blockwork IT at Milpitas, California

CAD Engineer for Nvidia at Santa Clara, California

Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California

SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024

PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024

DVCon U.S. 2025 at United States - Feb 24 - 27, 2025

DATE 2025 - Design, Automation and Test in Europe Conference at France - Mar 31 - 2, 2025