UPMEM selects Semidynamics RISC-V AI IP for Large Language Model Application

HighTec C/C++ Compiler Suite Supports Andes’ ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications

Andes Technology Collaborates with Lauterbach to Deliver RISC-V Trace Solution

Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M

Iontra Closes $45 Million Series C to Deliver Launch of the Industry's First Integrated RISC-V Charge Control and Fuel Gauge Microcontroller

Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC

Arm, Exostellar Boost AI Cloud for Chip Design Exostellar

JB Baker, VP Products ScaleFlux

Josep Montanya , CEO Nanusens

EDACafe Editorial by Roberto Frazzoli Rapidus advancements; automotive AI updates; CHIPS Act supporting SOI and SiC fabs; Qualcomm-Arm legal battle

Industry Predictions by Sanjay Gangal EDACafe Industry Predictions for 2025 – Point2 Technology

Siemens EDA by Juergen Jaeger FPGA-based prototyping – to build, or to buy, that is the question!

Guest Blogger by Sanjay Gangal Intel Foundry Unveils Breakthroughs in Transistor and Packaging Technologies at IEDM 2024

The Dominion of Design by Sanjay Gangal EDACafe Industry Predictions for 2025 – Semidynamics

Consumer Electronics Show 2025 - CES 2025 at Las Vegas Convention Center NV - Jan 7 - 10, 2025

ESD Alliance "Savage on Security” Webinar at United States - Jan 23, 2025

SEMICON Korea 2025 at Hall A, B, C, D, E, GrandBallroom, PLATZ, COEX, Seoul Korea (South) - Feb 19 - 21, 2025

DVCon U.S. 2025 at United States - Feb 24 - 27, 2025