OIF to Showcase 25 Years of Driving Optical Networking Transformation at NGON & 5G Transport 2023, Hosts Sessions on Interoperability Advancements in 800LR/ZR, 400ZR, CEI, CMIS and Co-Packaging

OIF Launches the Industry’s First Co-Packaging Standard – the 3.2T Co-Packaged Module Implementation Agreement

OIF Highlights 400ZR, Co-Packaging Architectures, CEI-112G & CEI-224G and CMIS Implementations Interoperability Among 30+ Global Companies; Hosts Special Anniversary Events at OFC 2023

OIF Hosts Largest Ever Multi-Vendor Interoperability Demonstration of the Solutions Accelerating Next-Generation Capabilities at OFC 2023; Celebrates 25 Years of Interoperability Work

OIF Marks 25th Anniversary, Launches New Physical & Link Layer Working Group Electrical Project and Adds 112G VSR Clause to CEI 5.0 IA at Q1 Technical and MA&E Committees Meeting

OIF to Update Industry on Next-Generation Electrical and Optical Interface Projects, including 224 Gbps & Co-Packaging, at DesignCon 2023

Anthony Dawson, VP ANSYS

Jeff Wilson, Director Siemens EDA

Lou Ternullo, Senior Director of IP Product Management Rambus

EDACafe Editorial by Roberto Frazzoli Siemens acquires Altair; AI architecture modeling; IBM demonstrates 21nm lines; limited effectiveness of U.S. export restrictions

The Dominion of Design by Sanjay Gangal Siemens’ Calibre 3DThermal: Pioneering Thermal Management in Next-Gen 3D-IC Design

Bridging the Frontier by Bob Smith, Executive Director PDF Solutions’ John Kibarian on Bringing Semiconductor Manufacturing and Design Closer

EDACafe Editorial by Sanjay Gangal A New Era in RISC-V: SiFive’s HiFive Premier P550 Paves the Way for Software Innovation

Siemens EDA by Romain Petit Revolutionizing Debugging with Veloce proFPGA CS: Unleashing Full Visibility with the First FPGA VP1902 Powered Software Prototyping System

CAD Engineer for Nvidia at Santa Clara, California

Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California

Sr. Silicon Design Engineer for AMD at Santa Clara, California

Design Verification Engineer for Blockwork IT at Milpitas, California

GPU Design Verification Engineer for AMD at Santa Clara, California

Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California

Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024

SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024

DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024

SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024