CompoundTek Collaborates with Cadence and Lumerical to Deliver Integrated Electronic-Photonic Design Automation PDK for Silicon Photonics ICs

Global Unichip Corporation Uses Cadence Digital Implementation and Signoff Flow to Deliver Advanced-Node Designs for AI and HPC Applications

New Cadence UltraLink D2D PHY IP for Die-to-Die Connectivity Enables High-Performance Applications With Cost-Effective Packaging

Cadence Announces Tempus Power Integrity Solution for Signoff Timing-Aware IR Drop Analysis

SEGGER introduces J-Link WiFi, a new member of the J-Link family of debug probes

UltraSoC furthers academic support with Europractice partnership

Ricky Lau, CTO The Six Semiconductor

Arm, Exostellar Boost AI Cloud for Chip Design Exostellar

SuperGuard Library Safety Qualification Suite - Solid Sands Solid Sands

EDACafe Editorial by Roberto Frazzoli Nvidia-powered CAE acceleration; new Keysight EDA software; CoWoS roadmap; new datacenter inference solution

Siemens EDA by Sanjay Gangal Enhance power reliability through design-stage layout optimization

Bridging the Frontier by Paul Cohen Honoring Dr. Jason Cong During the Phil Kaufman Award Ceremony and Banquet

Industry Predictions by Sanjay Gangal Intel’s New Xeon 6 SoC Redefines vRAN Efficiency, Single-Server Footprint for Cell Sites

EDACafe Editorial by Sanjay Gangal Siemens’ Innexis Suite Advances Shift Left for Faster, Earlier IC Development

GPU Design Verification Engineer for AMD at Santa Clara, California

Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California

Sr. Silicon Design Engineer for AMD at Santa Clara, California

Design Verification Engineer for Blockwork IT at Milpitas, California

Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California

SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024

PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024

DVCon U.S. 2025 at United States - Feb 24 - 27, 2025

DATE 2025 - Design, Automation and Test in Europe Conference at France - Mar 31 - 2, 2025