Wind River Teams with Xilinx on Secure and Safe Platform for Automated Driving Applications

Xilinx Alveo Accelerators Power SK Telecom's Real-Time AI-based Physical Intrusion and Theft Detection Service

Neural Network Inference at Dramatically Lower Latency Compared to GPUs with Zebra by Mipsology on Xilinx Alveo U50 Accelerators

Xilinx Announces Vitis - a Unified Software Platform Unlocking a New Design Experience for All Developers

Silexica Demonstrates SLX FPGA Tool With New Xilinx Vitis Unified Software Platform

Exxact Announces Xilinx Alveo Accelerator-Powered Servers & Workstations: Now Shipping Worldwide

Josep Montanya , CEO Nanusens

Arm, Exostellar Boost AI Cloud for Chip Design Exostellar

Simon Rance, Director of Product Management and Strategic Marketing Keysight Technologies

EDACafe Editorial by Roberto Frazzoli Nvidia-powered CAE acceleration; new Keysight EDA software; CoWoS roadmap; new datacenter inference solution

Bridging the Frontier by Paul Cohen Honoring Dr. Jason Cong During the Phil Kaufman Award Ceremony and Banquet

Industry Predictions by Sanjay Gangal Intel’s New Xeon 6 SoC Redefines vRAN Efficiency, Single-Server Footprint for Cell Sites

EDACafe Editorial by Sanjay Gangal Siemens’ Innexis Suite Advances Shift Left for Faster, Earlier IC Development

Siemens EDA by Romain Petit Multi-FPGA Partitioning – What’s the Recipe for Success?

Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California

Design Verification Engineer for Blockwork IT at Milpitas, California

Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California

Sr. Silicon Design Engineer for AMD at Santa Clara, California

CAD Engineer for Nvidia at Santa Clara, California

GPU Design Verification Engineer for AMD at Santa Clara, California

SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024

PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024

DVCon U.S. 2025 at United States - Feb 24 - 27, 2025

DATE 2025 - Design, Automation and Test in Europe Conference at France - Mar 31 - 2, 2025