Toshiba Launches 4-channel H-bridge Motor Driver IC with Maximum Ratings of 40V and 3.5A

Toshiba's New ICs for Bluetooth® Smart Devices Offer the Industry's Lowest Class Current Consumption and Enhanced Security

Toshiba Unveils NVMe™ SSDs Using 64-Layer, 3D Flash Memory

Toshiba Launches High Voltage Intelligent Power Device with 600V and 5A Rating

Toshiba Tec Unveils World's First Monochrome Multi-function Peripheral with Erasable Print Capability

Toshiba Expands Line-Up of Photorelays in DIP8 Packages by Adding Mid-Voltage Range Products

JB Baker, VP Products ScaleFlux

Firas Mohamed President IROC Technologies

Ricky Lau, CTO The Six Semiconductor

EDACafe Editorial by Roberto Frazzoli Nvidia-powered CAE acceleration; new Keysight EDA software; CoWoS roadmap; new datacenter inference solution

Siemens EDA by Sanjay Gangal Enhance power reliability through design-stage layout optimization

Bridging the Frontier by Paul Cohen Honoring Dr. Jason Cong During the Phil Kaufman Award Ceremony and Banquet

Industry Predictions by Sanjay Gangal Intel’s New Xeon 6 SoC Redefines vRAN Efficiency, Single-Server Footprint for Cell Sites

EDACafe Editorial by Sanjay Gangal Siemens’ Innexis Suite Advances Shift Left for Faster, Earlier IC Development

Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California

Design Verification Engineer for Blockwork IT at Milpitas, California

Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California

CAD Engineer for Nvidia at Santa Clara, California

Sr. Silicon Design Engineer for AMD at Santa Clara, California

GPU Design Verification Engineer for AMD at Santa Clara, California

SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024

PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024

DVCon U.S. 2025 at United States - Feb 24 - 27, 2025

DATE 2025 - Design, Automation and Test in Europe Conference at France - Mar 31 - 2, 2025