StarVision PRO™ works at different design levels, with different design languages and netlist formats, for easy debugging and analysis of SoCs and ICs
FREIBURG, Germany — (BUSINESS WIRE) — June 2, 2011 — Design and verification engineers who work on complex analog/mixed-signal (AMS) designs or who need to customize and integrate analog or digital IP building blocks into their system-on-chip (SoC) or integrated circuit (IC) designs will be able to assess a new analysis and debugging tool at DAC 2011. Due to the increasing use of building blocks in SoC design, engineers need to work at different design levels (RTL, gate, transistor, analog, etc.) as well as with different design languages and netlist formats. To support this challenge, Concept Engineering developed StarVision PRO™, an integrated debugging cockpit for A/MS and digital design that makes analysis and debugging of complex SoC and IC designs easy and more transparent.
“Increasingly, complex design requires design and verification engineers to integrate and understand design building blocks from different sources and on different design levels,” said Gerhard Angst, CEO and president of Concept Engineering. “In response to this challenge faced by so many customers, we built StarVision PRO precisely to provide a way to manage these different languages and design levels at the same time in the same integrated tool.”
StarVision PRO provides engineers with the ability to quickly and easily understand and debug mixed-mode designs and to customize and integrate IP building blocks into their complex SoCs and ICs. A combination of Concept Engineering’s successful tools for RTL-, gate-, and transistor-level debugging ( RTLvision® PRO, GateVision® PRO and SpiceVision® PRO), StarVision PRO provides full visibility and control over design data in one integrated debugging cockpit for designs that contain blocks defined at various levels, allowing analysis and debug of circuits with both digital and transistor-level components at the same time. StarVision PRO supports all important RTL, netlist and transistor-level languages: Verilog, SystemVerilog, VHDL, SPICE, HSPICE, ELDO, DSPF, EDIF and more.
Waveform Viewer and Signal Tracing
As well as providing easy signal tracing at different design levels and for different languages, with faster problem exploration and better visibility into IP building blocks, StarVision PRO also comes with a fully integrated waveform viewer and with support for interactive signal tracing in the source code, schematic view and waveform window. StarVision PRO compiles VCD simulation data into its own high-speed format for accelerated waveform browsing and signal tracing.
Fragment Navigation
StarVision PRO reduces the complexity of the debug process via its interactive logic cone navigation window, showing schematic fragments of just the critical portion of the design in the logic cone window while providing links to the original source code and simulation results at the same time. As a result, engineers can work easily on the important critical circuit fragments of their designs and are not disturbed by graphics and information that is not relevant for the job at hand. Visual feedback about important elements of the design (RTL, gates, transistors, parasitic elements) helps users to understand and solve the current design/verification problem.
Customization
StarVision PRO is very easy to use, with very high performance and high capacity. A tcl-based UserWare API provides flexible customization and allows access to the internal database and graphical user interface (GUI). Users can analyze the design data and generate company-specific and project-specific design reports and electrical design rulechecks (user-defined ERCs).
StarVision PRO and other Concept Engineering tools will be demonstrated in Booth #2831 at the 48th Design Automation Conference ( DAC 2011) in San Diego, CA from June 6th until June 8th.
About Concept Engineering
Concept Engineering is a privately held company based in Freiburg, Germany, founded in 1990 to develop and market innovative schematic generation and viewing technology for use with logic synthesis, verification, circuit characterization, circuit optimization, test automation and physical design tools. The company's customers are primarily EDA tool manufacturers (OEMs), in-house CAD tool developers, semiconductor and electronics companies. For more information, see http://www.concept.de
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Cayenne Communication LLC for Concept Engineering in North America
Michelle Clancy, +1-252-940-0981 (Editorial)
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