Advanced Optimization and Tight Signoff Correlation Contribute to Faster Design Closure

MOUNTAIN VIEW, Calif., May 13 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital multimedia solutions, has standardized on Synopsys' IC Compiler physical design solution, a key component of the Galaxy™ Implementation Platform, to deliver best performance, power and area on MediaTek's leading-edge wireless communications chips. IC Compiler's advanced placement, timing and power optimization along with its tight correlation to signoff has contributed to faster design closure.

"In the rapidly expanding wireless communications sector, we face intense time-to-market pressures to deliver designs on schedule while realizing aggressive performance, power and area goals," said MediaTek. "Having taped out several complex chips with IC Compiler, we believe it is a key enabler for us to meet our design goals. IC Compiler is now the chosen solution for our designs."

At MediaTek, hundreds of megahertz clock speeds and several complex clock domains coupled with a multi-power domain approach, including shutdown scenarios optimization, make design closure challenging. Minimum die area and leakage power are also important factors. Market pressures allow only a very short tapeout schedule, so achieving faster design closure is critical. IC Compiler's Zroute routing technology, its advanced placement, power and timing optimization; its tight correlation to Synopsys' PrimeTime® solution; and Synopsys' StarRC™ custom parasitic extraction to minimize late-stage timing ECOs were all key elements driving broad adoption of IC Compiler at MediaTek.

"Continuous technology innovation and rapid response to market needs have established MediaTek as one of the top five fabless companies worldwide," said Dr. Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "Collaborating with MediaTek on their cutting-edge chips has driven innovations in IC Compiler that reinforce its technology leadership position in place and route."

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, PrimeTime, Galaxy and StarRC are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

SOURCE Synopsys, Inc.

Contact:

Synopsys, Inc. MediaTek Inc. Sheryl Gulizia of Synopsys, Inc. Phone: +1-650-584-8635 Email Contact Lisa Gillette-Martin of MCA, Inc. Phone: +1-650-968-8900, ext. 115 Email Contact for Synopsys, Inc. Web: http://www.synopsys.com