Provides Mapping Between IEEE Std 1801™-2009 and Si2 CPF v1.1 Standards
AUSTIN, Texas — (BUSINESS WIRE) — March 2, 2010 — Silicon Integration Initiative (Si2) today announced that an “Interoperability Guide for Power Format Standards” has been published by Si2’s Low Power Coalition. The objective of this document is to facilitate interoperability between CPF v1.1 and IEEE 1801-2009 in support of multi-vendor tool flows. It is available to the industry at: http://www.si2.org/?page=1126
The guide documents a mapping between the subset of commands and arguments in 1801 and CPF that can be used to describe a low power design with consistent semantics to drive verification and implementation. This document, when combined with the Si2 LPC Glossary v1.1 ( http://www.si2.org/?page=1049), provides a complete and in-depth understanding of the key commonalities between the two power formats.
Si2 and the LPC also plan to offer, at no charge, a web-based seminar on best practices for low-power design flows that incorporate both formats, based upon this guide. Further details and free registration will be posted at http://www.si2.org/?page=1128
“The Interoperability Guide provides a tool for system architects, IP developers, RTL designers, verification engineers, logic and physical implementation engineers when working on power-sensitive IC designs in a multi-vendor EDA tool environment,” says Gary Delp, CTO of the Spirit Consortium and Chair of the IEEE P1801 Working Group. “I appreciate the leadership of LPC members to address this industry concern and further drive interoperability in low-power design.”
“The LPC's dedication to take a broad view of low-power design is commendable,” said Gill Watt, SOC CAD manager from AMD, Low Power Coalition Chair. “We look forward to adopting these best practices to help improve interoperability in our own multi-vendor design flows.”
The CPF standard was initially released in March of 2007. Today, CPF is supported by many adoption aids and tools, all available from Si2: a CPF tutorial (in both English and Mandarin), CPF Parser software, the CPF Pocket Reference Guide, and an LPC Glossary. A CPF Relational Analyzer is freely available to LPC members. CPF is also supported by the Power Forward Initiative ( http://www.powerforward.org), which is not affiliated with Si2 or the LPC.
The Low Power Coalition is an open industry group operating under the auspices of Si2. All interested parties are invited to join existing LPC members and participate.
About the Low Power Coalition (LPC)
The Low-Power Coalition (LPC) is delivering enhanced capabilities in low-power Integrated Circuit (IC) design flows relating to specification of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability. Member companies are: Advanced Micro Devices (NYSE: AMD), Apache Design Solutions, ARM (Nasdaq: ARMHY), Atrenta, Cadence Design Systems (Nasdaq: CDNS), Calypto Design Systems, Entasys, IBM (NYSE: IBM), LSI Logic (NYSE: LSI), Magma Design Automation (Nasdaq: LAVA), NXP, and Virage Logic (Nasdaq: VIRL). For further information, see http://www.si2.org/?page=726.
About Si2
Si2 is the largest organization of industry-leading semiconductor, systems, EDA and manufacturing companies focused on the development and adoption of standards to improve the way integrated circuits are designed and manufactured, in order to speed time-to market, reduce costs, and meet the challenges of sub-micron design. Now in its 22nd year, Si2 is uniquely positioned to enable timely collaboration through dedicated staff and a strong implementation focus driven by its member companies. Si2 represents nearly 100 companies involved in all parts of the silicon supply chain throughout the world. See www.si2.org
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Contact:
Silicon Integration Initiative (Si2)
Bill Bayer, 512-342-2244
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