Sidense OTP Memory IP Helps "Green Up" Audium's Power Amplifier

OTTAWA and BRISTOL, UK -- (MARKET WIRE) -- Jan 13, 2010 -- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) IP cores, and Audium Semiconductor, a developer of highly efficient audio power amplifier integrated circuits, have announced the use of Sidense's ultra-low-power SLP one-time programmable (OTP) memory in Audium's recently announced high efficiency AS1001 audio power amplifier chip. The Sidense OTP macro is used to predefine register defaults after a chip reset.

While traditional Class D amplifiers only achieve optimum efficiency at or near full output power, the AS1001 amplifies an audio signal over the entire operating output power range and includes techniques to minimize both fixed losses and output-dependant variable losses. At normal listening levels, the AS1001 is 20 times more efficient than a traditional Class D power amplifier. Operating from a nominal 1.5V power supply and delivering 100W peak power output, the AS1001 is so efficient that battery-powered amplified loudspeakers, playing for three hours per day, can run for up to 10 months on a set of four 'C' batteries. This high efficiency means a "greener" amplifier, since Audium technology greatly reduces carbon dioxide from power generation and pollution from battery production.

"A highly efficient audio power amplifier such as the AS1001 will find use in many consumer products, so minimum power and low cost are essential attributes," said Tom Schild, Vice President of Worldwide Sales for Sidense. "The ultra-low power requirements and very small size of Sidense SLP macros are an ideal fit for Audium's audio power amplifier OTP requirements."

"Optimizing the very high efficiency of our power amplifier ICs requires that every component used on the chips exhibit very low power dissipation," said Huw Davies, Chief Commercial Officer for Audium. "Sidense's OTP macros combine very low power, a small footprint and ease of programming, which helped Audium develop the most efficient audio power amplifier over normal listening levels in the industry."

About Sidense

Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 40 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense OTP memory, embedded in over 80 customer designs, is available from 180nm down to 55nm and is scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.

About Audium Semiconductor

Audium designs, develops and markets audio power amplifier integrated circuits that are 20 times more power efficient than competing technologies at normal listening levels. Utilizing our devices in consumer audio applications reduces power consumption, extends battery life, enables smaller form factors, cuts cost-of-ownership, reduces waste, and contributes towards a more sustainable environment, all without compromising system performance. For more information, please visit www.audiumsemi.com.

Add to Digg Bookmark with del.icio.us Add to Newsvine

Media Contacts:
Susan Cain
Cain Communications for Sidense
Tel: 503-538-2747
Email: 
Email Contact

Jim Lipman
Sidense
Tel: 925-606-1370
Email: 
Email Contact

Rob Ashwell
Publitek for Audium Semiconductor
Tel: +44 (0)1225 470000
Email: 
Email Contact


Featured Video
Jobs
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise