32nm e-MMC v4.4 Compliant Embedded Memories Combine Up To 64GB NAND and Controller in a Single Package
The new 64GB embedded device combines sixteen pieces of 32Gbit (equal to 4GB) NAND chips fabricated with Toshiba's cutting-edge 32nm process technology, and also integrates a dedicated controller. Toshiba is the first company to succeed in combining 16 pieces of 32Gbit NAND chips, and applied advanced chip thinning and layering technologies to realize individual chips that are only 30 micrometers thick. Full compliance with the JEDEC/MMCA Version 4.4(V4.4) standard for embedded MultiMediaCards supports standard interfacing and simplifies embedding in products, reducing development burdens on product manufacturers. (Please visit http://www.toshiba.com/taec/news/media_resources/news_mr_gallery.jsp for a photo of the seventeen layer stack.)
Toshiba offers a comprehensive line-up of single-package embedded NAND Flash memories in densities ranging from 2GB to 64GB. All integrate a controller to manage basic control functions for NAND applications, and are compatible with the latest e-MMC(TM) standard and its new features, including defining multiple storage areas and enhanced security features.
Demand continues to grow for embedded memories with a controller function that minimizes development requirements and eases integration into system designs. Toshiba has established itself as an innovator in this key area. The company was first to announce a 32GB e-MMC(TM) compliant device, and is now reinforcing its leadership by being first to market with a 64GB generation module.
"The e-MMC(TM) interface has become the most widely embraced embedded NAND solution with a built-in controller to simplify integration into system designs. With the addition of higher density, Ver 4.4 e-MMC(TM) compliant product offered as single package solutions or as part of a multi-chip module combined with DRAM, Toshiba can help designers reduce memory subsystem space requirements," said Scott Beekman, business development manager, mobile communications memory for TAEC.
Toshiba e-MMC(TM) Ver 4.4 devices are available in a standard configuration with the NAND flash and built-in controller or in a multi-chip module (MCP) with DRAM or other memory to reduce the memory subsystem requirement to one chip. Toshiba MCPs offer multiple memory technologies such as NAND Flash, NOR Flash, Pseudo SRAM (PSRAM), and low-power SDRAM in a single package to simplify layout and save valuable board space in increasingly complex, feature-rich cellular phones.
New Product Line-up
Sample Mass Production
Product Number Cap. Package Shipment Production Scale
THGBM2G9DGFBAI2 64GB 169Ball FBGA Dec. 2009 1Q, 2010
14x18x1.4mm (Jan.-Mar.)
3 million/
THGBM2G8D8FBAIB 32GB 169Ball FBGA Feb. 2010 2Q, 2010 month
12x16x1.4mm (Apr.-Jun.) (Total)
THGBM2G7D4FBAI9 16GB 169Ball FBGA Jan. 2010 1Q, 2010
12x16x1.2mm (Jan.-Mar.)
THGBM2G6D2FBAI9 8GB 169Ball FBGA Mar. 2010 2Q, 2010
12x16x1.2mm (Apr.-Jun.)
THGBM2G5D1FBAI9 4GB 169Ball FBGA Apr. 2010 2Q, 2010
12x16x1.2mm (Apr.-Jun.)
THGBM2G4D1FBAI8 2GB 153Ball FBGA 2Q, 2010 3Q, 2010
11.5x13x1.2mm (Apr.-Jun.) (Jul.-Sep.)
Key Features
1. The JEDEC/MMCA V4.4 compliant interface handles essential functions,
including writing block management, error correction and driver software.
It simplifies system development, allowing manufacturers to minimize
development costs and speed up time to market for new and upgraded
products.
2. A wide product line-up supports capacities from 2 to 64GB. The
high-capacity 64GB embedded devices can record up to 1,070 hours of music
at a1 28Kbps bit rate, 8.3 hours of full spec high definition video(4)
and 19.2 hours of standard definition video.
3. The 64GB device stacks sixteen 32Gbit chips fabricated with leading-edge
32nm process technology. Application of advanced chip thinning, layering
and wire bonding technologies allowed Toshiba to achieve individual chips
only 30 micrometers thick, and to layer and bond them in a small package.
The result is the highest density embedded NAND flash memory module in
the industry.
4. The new chips support the advanced partitioning and security of e-MMC(TM)
V4.4. Multiple storage areas can be configured, including several
enhanced memory areas for system files or code, and a multi-level cell
(MLC) area for data storage. The new 64GB product is sealed in a small
FBGA package, which is 14mm x 18mm x 1.4mm and has a signal layout
compliant with JEDEC/MMCA V4.4.
Specifications
e-MMC
Interface JEDEC/MMCA V4.4 standard HS-MMC interface
Power Supply 2.7V to 3.6V(memory core);
Voltage 1.65V to 1.95V / 2.7V to 3.6V (interface)
Bus width x1, x4, x8
Write Speed(5) Target 20MB per sec. (Sequential/Interleave Mode)
Target 9MB per sec. (Sequential/No Interleave Mode)*
Read Speed(5) Target 37MB per sec. (Sequential Mode/Interleave
Mode)
Target 22MB per sec. (Sequential/No Interleave Mode)*
Temperature range -25degrees to +85degees Celsius
Package 153Ball FBGA (+16 support balls)
*Available only for THGBM2G5D1FBAI9 and THGBM2G4D1FBAI8.
