Netronome Targets Convergence of Servers and Networking with Industry’s First Network Flow Processors for Unified Computing

PITTSBURGH — (BUSINESS WIRE) — May 27, 2009 Netronome, a leading developer of highly programmable semiconductor products that provide intelligent and secure flow processing for virtualized servers and network equipment, today announced the availability of the NFP-32xx family of Network Flow Processors™. The NFP-32xx is the industry’s first processor to remove the barriers in unified computing architectures by combining the NFP’s high-performance network, content and security processing with general purpose processors, such as Intel’s IA, through I/O virtualization. Additionally, the NFP-32xx is the only line of processors backward-compatible with the market-leading Intel® IXP28XX, protecting customers’ investment in field-proven and network-hardened software.

“With such a large base of existing IXP28XX customers, the Netronome NFP is well positioned to intercept the convergence of the network and data center,” said Bob Wheeler, senior analyst at The Linley Group. “A programmable dataplane, with hardware-based I/O virtualization and integrated security goes beyond what L2-L3 NPUs, security processors and embedded communication processors individually offer to meet the requirements of next-generation switches, routers, wireless infrastructure, appliances and servers.”

“The NFP provides existing IXP28XX customers with a path forward for the evolution of their high-performance product designs,” said Rose Schooler, general manager, Performance Products Division, Intel's Embedded Computing Group.

High Performance Networking with Power Efficiency

For designers of communications equipment whose network processing requirements extend beyond simple forwarding, the NFP-32xx provides intelligent packet processing in a power-efficient design.

  • High-Performance: Powered by 40 multi-threaded programmable networking cores running at 1.4GHz, the NFP delivers over 56 billion instructions per second with 320 hardware threads that optimize memory utilization - allowing for 1800 instructions per packet at 30 million packets per second. This enables 20Gbps of L2-L7 deep packet processing with line-rate security and I/O virtualization for millions of simultaneous flows.
  • Power Efficiency: Operating at only 15 to 35 watts, the NFP-32xx revolutionizes green computing by delivering more than four times the power efficiency of its closest competitor.

“The NFP’s massively parallel microengine architecture has unique advantages over traditional technologies,” said Peder Jungck, founder and CTO at CloudShield Technologies. “This allows us to achieve a new level of scalability for our content and network processing platform.”

Software-Defined I/O: Programmable Processing for Ultimate Flexibility

Unlike fixed-function ASICs and configurable NPUs, Netronome’s NFPs are the first fully programmable processors capable of addressing the increasingly complex requirements of unified computing architectures. Software-defined I/O supports both L2-L3 packet processing and L4-L7 application- and content-aware deep packet inspection. This programmability, coupled with line rate packet processing, provides the highest level of inspection and throughput available in the industry for traditional NPU applications such as high-performance line cards.

“Anagran’s products eliminate network congestion by constantly maintaining flow state for a large number of dynamic applications and protocols,” said John Harper, vice president of engineering at Anagran. “The NFP delivers the performance and programmability required to allow us to meet our customers’ requirements, while avoiding the costly, lengthy and risky process of a custom ASIC development.”

This unique combination of programmability and performance also enables a new approach for unified computing adapter cards by replacing dedicated hardware for FCoE HBAs, iSCSI, TOE and other functions with flexible implementations in firmware. In addition, virtual switches, load balancers and firewalls required in unified computing platforms can be implemented allowing virtualized server vendors to rapidly adapt to the changing standards in the convergence of networking and computing.

Network Virtualization in Silicon

Virtualized multicore CPUs are increasingly used in switches, routers, and network appliances for control, data plane, security and other networking applications. To scale network performance to 10Gbps and beyond the NFP-32xx offers a PCIe v2.0 implementation including extended SR-IOV with 256 queues to provide guaranteed bandwidth and low latency access to shared I/O devices. Netronome’s SR-IOV drivers include configurable algorithms for load balancing to virtualized multicore CPUs and efficient zero-copy mechanisms that significantly improve CPU, memory and system bandwidth utilization. In addition to eight PCIe lanes, the NFP supports a wide range of popular high-speed network interfaces including dual 25Gbps Interlaken, SPI-4.2 and dual 10Gbps XAUI.

“The NFP offers an exciting new model for optimizing I/O in virtualized server systems by combining the flexibility of an entirely software-based architecture with the performance and scalability of dedicated and programmable networking engines to deliver a powerful I/O fabric on every server,” said Simon Crosby, CTO of the Virtualization and Management Division at Citrix Systems. “With the rapid increase in the number of VMs per server enabled by Moore's Law, XenServer can take advantage of the NFP to deliver greater I/O performance with per-VM QoS guarantees while enforcing multi-tenancy, per-VM ACL policies and security functions.”

Integrated Hardware Acceleration for Security, Content and Parallel Processing

1 | 2  Next Page »
Featured Video
Jobs
CAD Engineer for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
MEMS & Sensors Executive Congress (MSEC 2024) at Château-Bromont Hotel in Bromont Quebec Canada - Oct 7 - 9, 2024
PCB West 2024 at Santa Clara Convention Center Santa Clara CA - Oct 8 - 11, 2024
DVcon Europe 2024 at Holiday Inn Munich City Center, Munich Germany - Oct 15 - 16, 2024
International Test Conference (ITC) at United States - Nov 3 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise