“To date, 19 patents have been issued to SynTest, but SynTest’s proprietary scan compression technologies covered by these two patents are particularly exciting to me because they have been used in our innovative scan compression VirtualScan product offering since June 2002 when we filed these patents and announced the VirtualScan product offering at the 2002 ACM/IEEE Design Automation Conference,” said Dr. L.-T. Wang, founder, president & CEO of SynTest. “Our patented compression architecture and method allows our technology to guarantee very high fault coverage while minimizing test data volume and test application time. The novel compression architecture featured in these patents includes a multiplexer network for stimulus decompression, and an optional scan connector to reorder the scan chains to further improve the circuit's fault coverage. Our patented method is based upon the use of a combinational logic network for stimulus decompression and an XOR network for response compaction, so with our invention, there is no need to solve any system of linear equations as a separate step after scan Automatic Test Pattern Generation (ATPG).”
“Significant efforts over many years have been undertaken to support the development and implementation of our combinational-logic-based compression architecture and the unique technology approach of our VirtualScan product offering,” added Dr. Ravi Apte, VP of Strategy, Marketing and Business Development of SynTest.
About SynTest
SynTest Technologies, Inc., established in 1990, develops IP for advanced Design-For-Test (DFT) and Design-For-Debug/Diagnosis (DFD) applications (including logic BIST, memory BIST, boundary-scan synthesis, Scan/ATPG with test compression, concurrent fault simulation, and silicon debug and diagnosis) and markets them throughout the world, to semiconductor companies, system houses and design service providers. SynTest products improve an electronic design’s quality and reduce overall design and test costs. SynTest is headquartered in Sunnyvale, California, and has field offices in Taiwan, Japan, Korea and China, and distributors in Europe, Asia, and Israel. More information regarding SynTest is available at www.syntest.com.
| SynTest Technologies Inc. |
| 505 South Pastoria Ave., Suite 101 |
| Sunnyvale, California 94086 |
| Phone: 408-720-9956 |
|
E-Mail: Email Contact |
© SynTest Technologies, Inc. 2008. All Rights Reserved. SynTest and TurboBIST-Logic are trademarks of SynTest Technologies, Inc. All other trademarks are property of their respective owners.
Contact:
SynTest Technologies Inc.
Ravi Apte, 408-720-9956 ext. 300
