Support for CEVA DSPs in ARM CoreSight debug and trace solution significantly reduces cost of debug and time-to-market for multiprocessor SoCs
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Many of today's complex SoCs for wireless and mobile multimedia applications adopt a multiprocessor architecture to deliver the optimal performance and extensive feature-sets demanded. Such a multiprocessor approach usually means more complex debug of the complete application. With the introduction of CEVA's Real-Time Trace module, mutual customers can gather traces of software execution on the CEVA DSP cores using ARM ETM technology, ensuring better overall system development and performance.
CEVA chose to adopt the proven technology of the ARM ETM technology and design the DSP to interface directly with it. The CEVA DSP ETM-technology-based interface adapts the unique DSP data and program access characteristics such as dual data bus interfaces and multi predicated program execution to the ETM interface to achieve full DSP visibility with a minimal amount of added logic. CEVA added additional filtering logic to make sure the high data throughput of a typical DSP application will not overflow ETM data traffic. Simultaneous tracing of ARM and CEVA DSP processors can be collected via the CoreSight Trace Funnel through a single trace port.
"At ARM, we strive to ensure our customers have the most extensive development ecosystem for their designs and by extending our support to include CEVA's DSP cores, we are significantly enhancing the development process for multicore and multiprocessor SoCs," said John Cornish, general manager, System Design Division, ARM. "The CoreSight Embedded Trace Macrocell technology will give mutual customers of CEVA and ARM faster and easier real-time debug of SoCs for wireless and mobile multimedia applications."
"For the development of today's complex SoCs, the 'cost of debug' is a significant factor in the process of bringing a product to market on time," said Eyal Ben-Avraham, vice president of strategic accounts and partners, CEVA. "The addition of real-time trace support to the CEVA DSP cores enables it to work with ARM's Embedded Trace Macrocell technology and further strengthens the comprehensive multiprocessor support embedded into our subsystems and application solutions for both hardware and software, simplifying the debug process."
ARM's CoreSight technology provides the most complete debug and trace solution for the entire system-on-chip (SoC). It makes ARM processor-based SoCs the easiest to debug and thus speeds development of higher quality products. CoreSight technology builds on the ARM Embedded Trace Macrocell (ETM) products, which are widely licensed and supported by the ARM RealView(R) development tools and more than 20 other leading tool vendors.
About CEVA, Inc.
Headquartered in San Jose, Calif., CEVA is a leading licensor of silicon intellectual property (SIP) DSP Cores and platform solutions for the mobile handset, consumer electronics and storage markets. CEVA's IP portfolio includes comprehensive solutions for multimedia, audio, voice over packet (VoP), Bluetooth and Serial ATA (SATA), and a wide range of programmable DSP cores and subsystems with different price/performance metrics serving multiple markets. In 2007, CEVA's IP was shipped in over 225 million devices. For more information, visit http://www.ceva-dsp.com
ARM is a registered trademark of ARM Limited. Cortex, CoreSight and Embedded Trace Macrocell are trademarks of ARM Limited. All other brands or product names are the property of their respective holders. "ARM" is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries: ARM, Inc.; ARM KK; ARM Korea Ltd.; ARM Taiwan Limited; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; AXYS Design Automation Inc.; ARM Germany GmbH; ARM Embedded Technologies Pvt. Ltd.; and ARM Norway, AS.
Web site: http://www.ceva-dsp.com/
