2008.04 Release of Novas Siloti Visibility Enhancement Solution Targets Gate-level Timing Simulation Overhead

April 28, 2008 -- Novas Software, Inc., the leader in debug and visibility enhancement solutions for complex chip designs, is now shipping the second quarter 2008 release of its award-winning Siloti™ Visibility Enhancement (VE) product. This latest release expands the patent-pending Siloti Replay technology to make the process of detecting, isolating, and fixing the source of timing problems using gate-level simulation much more efficient.

Improvements to Siloti Replay module include:
  1. Easy integration into existing simulation flows - only minimal changes to compilation environment required.
  2. Updated graphical user interface - simplifies set-up and configuration of timing simulation replay sessions, provides for seamless transition to and from Siloti data expansion-driven debug in Verdi environment.
  3. Updated command-line interface use model - Replay multiple time intervals in a single simulation session.
The new release also contains usability enhancements to the Siloti essential signal analysis and data expansion technologies, making it easier than ever to realize overall faster simulation times and smaller dump files.

For more information on the Siloti 2008.04 release, please view the product notes and download instructions online at the Novas customer support site.

About Novas Software

Novas Software, Inc. is the leading provider of design comprehension solutions that enhance verification of complex ICs, embedded systems and SoCs. The Verdi™ Automated Debug and Siloti™ Visibility Enhancement products cut debug time in half while dramatically minimizing simulation overhead. Novas’ global community brings together over 10,000 users and more than 50 third-party technology and service providers. Novas is headquartered in San Jose, Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit www.novas.com or email Email Contact.        

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