Lattice Semiconductor Reports First Quarter Financial Results

HILLSBORO, OR -- (MARKET WIRE) -- Apr 24, 2008 -- Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced financial results for the first quarter ended March 29, 2008.

For the first quarter, revenue was $56.6 million, an increase of seven percent from the $53.1 million reported in the prior quarter, and a decrease of three percent from the $58.1 million reported in the same quarter a year ago.

FPGA revenue for the first quarter was $13.7 million, up five percent from the $13.0 million reported in the prior quarter, and up 16 percent from the $11.9 million reported in the same quarter a year ago. PLD revenue for the quarter was $42.9 million, an increase of seven percent over the prior quarter PLD revenue of $40.1 million, and a seven percent decrease from the $46.3 million reported in the same quarter a year ago.

New product revenue for the first quarter was $11.2 million, up 20 percent from the $9.3 million reported in the prior quarter, and up 133 percent from the $4.8 million reported in the same quarter a year ago.

Net loss for the first quarter was $3.3 million ($0.03 per share), as compared to a prior quarter net loss of $229.5 million ($1.99 per share), and a net loss of $4.4 million ($0.04 per share) reported in the same quarter a year ago. These results include non-cash amortization charges, stock-based compensation expense and restructuring charges, which total $4.6 million and $3.9 million for the first quarter of 2008 and 2007, respectively, and $4.2 million for the fourth quarter of 2007. Also included in the net loss for the fourth quarter of 2007 is a non-cash impairment charge of $223.6 million related to the write-off of goodwill. Excluding these charges, non-GAAP net income for the first quarter was $1.4 million as compared to non-GAAP net loss of $1.7 million for the fourth quarter of 2007 and a non-GAAP net loss of $0.5 million for the same quarter a year ago. The Company believes exclusion of these charges more closely approximates its ongoing operational performance.

In the first quarter, the Company also recorded an unrealized loss of $7.9 million related to a decline in fair value of our auction rate securities that continue to experience unsuccessful auctions. The Company recorded this adjustment to accumulated other comprehensive loss because we consider the declines in fair value to be temporary.

"Last quarter was positive for Lattice on a number of dimensions," stated Steve Skaggs, President and CEO. "We resumed sequential quarterly revenue growth powered by 20 percent sequential growth in our New products which remain on track to achieve our stated goal of doubling during 2008. In addition, we improved gross margin and reduced operating expenses. The combination of these results allowed us to drive a significant enhancement to the bottom line and return to profitability on a non-GAAP basis."

First Quarter Business Highlights:

--  Lattice announced that the LatticeXP2™ FPGA family has been fully
    qualified and released to volume production.  Designed using the industry's
    most advanced non-volatile FPGA technology, a 90-nanometer embedded Flash
    process manufactured on 300mm wafers, LatticeXP2 devices provide customers
    the instant-on functionality and reduced footprint benefits of earlier
    Lattice non-volatile devices, while also enhancing design security, RAM
    back-up and live update capabilities. The volume production release of this
    family comes approximately two years after the production release of the
    original 130-nanometer LatticeXP™ family.  This rapid transition between
    technology generations demonstrates Lattice's ongoing commitment to
    leadership in the non-volatile FPGA segment.
    
--  Lattice and Synplicity, Inc., a leading supplier of  IC design and
    verification solutions, announced that Synplicity will become Lattice's
    exclusive OEM synthesis partner.  As part of this new agreement, Lattice
    will enhance its OEM synthesis offering in the ispLEVER® design tool
    suite to include the industry-leading Synplify Pro logic synthesis software
    for higher-level designs.
    
--  Lattice and Aldec, Incorporated, a leading provider of EDA
    verification products, announced a new agreement that will deliver their
    mutual customers the only OEM version of a mixed language simulator for
    FPGA design.  Active-HDL Lattice Edition will be bundled with Lattice's
    ispLEVER® design tool suite, providing mixed language simulation (VHDL,
    Verilog and SystemVerilog), co-simulation with Simulink® from The
    MathWorks™ and simulation support for Lattice encrypted IP Cores.
    
--  Lattice announced that Praesum Communications, a switching and
    bridging solutions provider, has optimized its high-performance Serial
    RapidIO® Interface Endpoint solution for the low-cost LatticeECP2M™
    family featuring embedded SERDES I/O.  Lattice and Praesum plan to develop
    system solutions targeting digital signal processing, embedded computing,
    military/aerospace and communications infrastructure.
    
--  Lattice announced the successful interoperation of its LatticeECP2M
    FPGA family with Linear Technology's 16-bit, 105Msps, high-speed ADC
    (Analog to Digital Converter) in support of the JESD204 high-speed serial
    specification.  This interoperation enables a lower cost, lower power and
    smaller footprint solution for the interface between data converters and
    FPGA devices.  This is particularly important for cost sensitive, high
    volume applications such as wireless base stations.
    
--  Lattice expanded its commitment to open source embedded system design
    by releasing an implementation of the uClinux Operating System (OS)
    targeted for the LatticeMico32™ embedded soft core processor.  The new
    OS support allows developers to rapidly implement control systems in a
    design flow that builds on Lattice's open source embedded solutions
    approach.
    
--  Lattice announced that automotive versions of its second generation
    mixed-signal Power Manager II product family now meet the certification
    requirements of the AEC-Q100 standard as defined by the Automotive
    Electronics Council (AEC) and have been added to its growing automotive
    product portfolio. The Power Manager II family provides a complete power
    management solution for a printed circuit board (PCB) through an optimized
    set of programmable digital and analog functions.
    

Business Outlook - June 2008 Quarter:

--  Revenue is expected to grow 1 percent to 4 percent on a sequential
    basis;
--  Gross margin percentage is expected to be approximately 55.5% to 56.0%
    of revenue;
--  Total operating expenses are expected to be approximately $33 million
    (excludes potential one-time charge related to the employment of a new
    Chief Executive Officer);
--  The Company expects to incur a charge of approximately $0.9 million
    (including a non-cash charge of approximately $0.3 million) in connection
    with the previously announced 2007 Restructuring Plan;
--  Intangible asset amortization is expected to be approximately $1.4
    million; and
--  Other income is expected to be approximately $1.3 million.
    

Discussion of Non-GAAP Financial Measures:

Management evaluates and makes operating decisions using various performance measures. In addition to our GAAP results, we also consider adjusted net income, which we refer to as non-GAAP net income (loss). This measure is generally based on the revenue of our products and the costs of those operations, such as cost of products sold, research and development, sales and marketing and general and administrative expenses, that management considers in evaluating our ongoing core operating performance. Non-GAAP net income (loss) excludes impairment charges, amortization of intangible assets, stock-based compensation and restructuring charges. Impairment charges relate to the write-off of Goodwill which was acquired through acquisitions and was determined in the fourth quarter of 2007 to have no implied fair value. Intangible assets relate to assets acquired through acquisitions and consist of technology purchased in connection with the acquisitions. Stock-based compensation charges are related to the adoption of SFAS No. 123(R) effective January 1, 2006, and include expense for items such as stock options and restricted stock units granted to employees and purchases under the employee stock purchase plan. Restructuring charges consist of expenses and subsequent adjustments incurred under corporate restructuring plans that were initiated in the fourth quarter of 2005 and in the third quarter of 2007, and include items such as severance costs, costs to vacate space under long-term lease arrangements, and other related expenses.

Non-GAAP net income (loss) is a supplemental measure of our performance that is not required by and not presented in accordance with GAAP. Moreover, it should not be considered as an alternative to net loss, operating loss or any other performance measure derived in accordance with GAAP, or as an alternative to cash flow from operating activities or as a measure of our liquidity. Investors and potential investors are encouraged to review the reconciliation of non-GAAP financial measures contained within this press release with our net loss, which is our most directly comparable GAAP financial result. For more information, see the consolidated statement of operations contained in this earnings release.

1 | 2  Next Page »
Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise