The certified High-Speed USB PHY core runs at 2.5 volts and is compliant with the USB 2.0 standard, including 5 volt protection on the D+ D- ports. The unique analog programmability of the IP is a key feature that enables system-on-chip (SoC) designers to fine tune the complete system for optimized performance. The CI12351tn is designed in a multi-port architecture, which offers an additional benefit for applications requiring several USB ports on the same chip. The IP's compact design and block re-utilization features allow designers to configure up to 8 ports on a space-saving modular architecture.
"Chipidea's goal is to provide USB IP blocks that offer designers the ability to get to market quickly at the lowest cost and with the fastest time to integration," said Celio Albuquerque, director of Chipidea's Physical Solutions Division. "Verification of our PHY on TSMC's 65nm GP process continues to build on our strategy to be the first in the market to offer silicon-proven USB PHY in the most advanced technology nodes."
"We work closely with our IP partners to make high-quality IP available for customers," said Kuo Wu, deputy director of Design Services Marketing at TSMC. "Chipidea's USB high-speed PHY product met our strict IP quality guidelines at the 65nm GP process node."
Chipidea provides the widest selection of certified USB cores, which are available at several of the industry's leading foundries and process nodes.
About Chipidea
Chipidea is the world's number one analog/mixed-signal merchant technology supplier targeting fast-growing market segments including wireless communications, digital media and consumer electronics. Chipidea supports blue-chip customers across the globe, has an impeccable reputation for delivering high-quality products and is known for its reliable execution. Chipidea licenses its technology to leading companies in all major markets, delivering everything from high-precision, single-function blocks to full analog sub-systems. For more information, please visit www.chipidea.com
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