Synopsys' investment was driven by the desire of both companies to lower the cost and risk of designing complex system-on-a-chip (SoC) integrated circuits and to foster industry-wide IP reuse capability. The Arteris NoC supports a wide array of IP protocols including ARM(R) AMBA(R) 3 AXI(TM), ARM AMBA 2 AHB(TM) and OCP(TM) protocols, which can be used concurrently without modification.
"Our investment in Arteris is not just a financial transaction," said Randy Tinsley, vice president of strategy and corporate development, Synopsys. "We see Network-on-Chip technology as a major driver for improving the technical performance and cost of results for complex SoCs. Arteris has established itself as the early leader in this space."
"Arteris' goal is to establish our NoC interconnect technology as a major category of IP and a viable approach to improve architectures of complex SoCs. We are pleased with Synopsys' confidence in our technology and with the continued support of our original investors," said Charlie Janac, president and CEO of Arteris. "With Synopsys' help on methodology and awareness, the broad NoC ecosystem will benefit semiconductor, IP, and EDA companies by helping to provide a flexible platform for IP reuse."
Arteris will use the new investment to expand its market development activities and further develop its NoC technology. As part of the investment, Arteris has re-incorporated in the United States, maintaining a French subsidiary in Paris. The Company plans to grow headcount both in the United States and Europe in support of local customers.
As part of the funding agreement, Synopsys will obtain a Board Observer position. Both companies expect to maintain their existing third-party relationships with other synergistic suppliers.
About Arteris
Arteris, Inc. provides IP and associated design tools to improve performance of system-on-chip (SoC) architectures for multimedia, telecom and mobile. Arteris' Network-on-Chip (NoC) solutions transport and manage the on-chip communications within complex SoC integrated circuits, increasing performance, reducing number of global wires, with lower power utilization while enabling the most complex, IP-laden designs. It allows chip developers to implement efficient and high-performance NoC designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Arteris' technology is scaleable in terms of the number of IP blocks designers can network, as well as with deep submicron silicon manufacturing processes. The NoC solutions are compatible with existing design flows and with IP interface standards.
The international company operates globally with headquarters in San Jose, California and an office in Paris, France. Arteris has raised more than $24 million in equity investment from an international set of venture capitalists, including Synopsys, Inc., Crescendo Ventures, Techno Venture Management, and Ventech. More information can be found at www.arteris.com.
Arteris, the Arteris logo, NoCcompiler, NoCexplorer are trademarks of Arteris, Inc.
Synopsys and DesignWare are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.
Contact:
Arteris, SA, Paris
Charlie Janac, +33 1 61 37 38 63
Email Contact
or
Wired
Island, Ltd.
Mike Sottak, 408-876-4418
Email Contact
