NEC System Technologies Demonstrates CyberWorkBench ESL Synthesis Tool With Sequence PowerTheater At DAC

SANTA CLARA, Calif.—(BUSINESS WIRE)—June 1, 2007— NEC System Technologies, Ltd. (NEC-ST) will demonstrate a preliminary integrated solution for power-aware ESL productivity at DAC 2007 in San Diego in the NEC-ST booth (# 1764).

NEC-ST's CyberWorkBench ESL synthesis with Sequence's PowerTheater power management solution delivers the ability to analyze various architectures for performance, area, and power.

To schedule a suite demo, please go to http://www.cyberworkbench.com/english/dac2007.html or contact mailto:dac2007@mls.necst.nec.co.jp. To see more about CyberWorkBench, please go to www.cyberworkbench.com/english/

About PowerTheater

PowerTheater is the industry standard for low-power design at RTL. Capabilities include accurate RTL power analysis closely correlated to actual silicon; power management tools that allow designers to reduce power at RTL using "what-if" scenarios and make early tradeoffs at the architectural level; power vector forward technology to select vectors for downstream analysis, feeding them to later stages of the design cycle for gate-level verification and voltage-drop analysis; and gate-level power verification, preventing power creep.

About Sequence

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence Design-For-Power solutions give customers the competitive advantage necessary to excel in aggressive technology markets. For more information: sequencedesign.com.

All trademarks mentioned herein are the property of their respective owners.

Contact:

Sequence Public Relations
Jim Lochmiller, 541-821-3438
Email Contact

Featured Video
Jobs
Sr. Silicon Design Engineer for AMD at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
GPU Design Verification Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise