August 5, 2024, Munich – T2MIP, a leading provider of semiconductor IP cores, proudly announces the immediate availability of their partner's MIPI D-PHY v2.5 Tx and DSI Tx Controller IP core solutions on the advanced 22ULP (Ultra-Low Power) process node. These solutions are designed to deliver exceptional performance and energy efficiency, making them ideal for the most demanding applications in the mobile, automotive, AI, and IoT sectors.
MIPI D-PHY v2.5 Tx, now available in 22ULP , offers data rates of up to 4.5 Gbps per lane, with an aggregate data rate of up to 18 Gbps across four lanes. This high-performance IP core fully complies with the MIPI D-PHY v2.5 specifications, ensuring seamless integration and interoperability with other compliant devices. The use of the 22ULP process node enhances its energy efficiency, supporting low-power states to extend battery life in portable devices.
Silicon-proven MIPI D-PHY v2.5 Tx IP Core in 22ULP is poised to meet the increasing demand for high-speed, low-power data transmission. As technological advancements push the boundaries of what devices can do, efficient and reliable interfaces become crucial. The 22ULP process node allows the MIPI D-PHY v2.5 Tx to operate at lower power levels without compromising on speed, making it perfect for battery-operated applications. Its compliance with MIPI D-PHY v2.5 ensures interoperability and standardization, which is vital for broad market adoption.
The scalability and robust performance of the MIPI D-PHY v2.5 Tx in 22ULP make it suitable for various applications, from smartphones and tablets to sophisticated automotive systems and AI-driven devices. Its proven reliability through silicon validation and compatibility with advanced technology nodes offers a future-proof solution that aligns with the evolving market needs. In a competitive landscape where performance and efficiency are paramount, the MIPI D-PHY v2.5 Tx in 22ULP stands out as a cost-effective, high-performance interface ready to meet modern technology demands.
MIPI DSI v2.0 Controller IP core solution
, also available in 22ULP, delivers a versatile and efficient means for driving displays in numerous applications. Supporting up to four data lanes and a maximum data rate of 2.5 Gbps per lane, this IP core ensures high-speed and reliable data transmission. Compliance with MIPI DSI v2.0 specifications guarantees interoperability, providing a reliable and efficient way to transmit high-resolution video and graphics data from the SoC to the display panel. The 22ULP process further enhances power efficiency, making it suitable for mobile devices, automotive displays, and other power-sensitive applications.
Availability: T2M’s comprehensive Silicon Interface IP Core Portfolio includes a broad range of interface solutions, such as USB, HDMI, Display Port, DDR, MIPI (CSI, DSI, Soundwire, I3C), 10/100/1000 Ethernet, programmable SerDes, SD/eMMCs, and Analog IPs. These IPs are designed to cater to various connectivity and communication needs in modern semiconductor designs.
About T2M-IP: T2M’s IP cores are available in major fabs and support process geometries as small as 7nm, including the latest 22ULP process node. This ensures compatibility with cutting-edge manufacturing technologies and allows these IPs to be ported to other foundries and advanced process nodes upon request. With a focus on high performance, low power consumption, and industry standards compliance, T2M's Silicon Interface IP Core Portfolio offers versatile and reliable solutions for next-generation electronic devices.
For more information, please visit www.t-2-m.com.
