"As bandwidth demands soar to new heights, companies are turning to multi-die designs at an accelerated pace to achieve greater levels of processing power and performance for their AI and high-performance computing applications," said Sanjay Bali, vice president of strategy and product management for the Synopsys EDA Group. "Our long-standing and deep collaboration with Intel Foundry, resulting in a production-ready AI-driven multi-die reference flow for EMIB technology, provides our mutual customers with a comprehensive solution that helps them develop their billion- to trillion-transistor multi-die systems."
"Addressing the design and packaging complexities of multi-die architectures requires a holistic approach to solving the thermal, signal integrity, and interconnect challenges," said Suk Lee, VP & GM of Ecosystem Technology Office, at Intel Foundry. "Intel Foundry's manufacturing and advanced packaging technologies, combined with Synopsys' certified multi-die reference flow and trusted IP, provides designers with a comprehensive and scalable solution for fast heterogeneous integration using the Intel Foundry's EMIB technology."
AI-Driven EDA Reference Flow and IP for Multi-Die Designs
Synopsys offers a comprehensive and scalable multi-die solution for fast heterogeneous integration. The solution, from silicon to systems, enables early architecture exploration, rapid software development and system validation, efficient die-package co-design, robust die-to-die connectivity, and improved manufacturing and reliability. Adopted by multiple leading customers, Synopsys 3DIC Compiler, a key component of the multi-die solution, is integrated with
Ansys® RedHawk-SC Electrothermal™ multiphysics technology, to address the power and thermal signoff critical for 2.5D/3D multi-die designs. In addition, the solution maximizes system performance and quality of results at a rapid pace with Synopsys 3DSO.ai, an autonomous AI-driven optimization engine for 2.5D and 3D multi-die designs.
Synopsys is developing IP for Intel Foundry process technologies, providing the interconnects needed to build multi-die packages with reduced integration risk and accelerated time-to-market. The combination of Synopsys IP and Synopsys 3DIC Compiler can enable up to 30% reduction in effort and 15% improvement in quality of results (as measured by margin) compared to traditional manual flows by automating routing, interposer studies, and signal integrity analysis.1
Availability and Resources
The reference flow is available now from either Intel Foundry or Synopsys.
- Learn more about the Synopsys Multi-Die Solution: https://www.synopsys.com/multi-die-system.html
- Learn more about Synopsys IP: https://www.synopsys.com/designware-ip.html
- Intel 18A collaboration announcement: https://news.synopsys.com/2024-02-21-Synopsys-and-Intel-Foundry-Accelerate-Advanced-Chip-Designs-with-Synopsys-IP-and-Certified-EDA-Flows-for-Intel-18A-Process
About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at
www.synopsys.com.
Editorial Contact
Kelli Wheeler
Synopsys, Inc.
(650) 584-5000
Email Contact
1 Benchmark test results as of February 2024 by Synopsys comparing manual and automated flows using Synopsys IP and Synopsys 3DIC Compiler.
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