eMemory’s Security-Enhanced OTP Qualifies on TSMC N4P Process, Pushing Forward in High-Performance Leading Technology

(Hsinchu Taiwan, January 25, 2024) eMemory announced that its security-enhanced version of One-Time Programmable (OTP), NeoFuse, has achieved qualification on the TSMC N4P process. As a performance-focused enhancement of TSMC’s 5nm family, N4P was optimized to provide a further enhanced advanced technology platform for both HPC and mobile applications. In addition, N4P lowers process complexity and improves wafer cycle time by reducing the number of masks. As NeoFuse is fully compatible with the N4P process, no additional masks are required.

NeoFuse OTP on the TSMC N4P process is an embedded one-time programmable NVM IP solution, featuring low operating power, robust reliability, and heightened security. The security-enhanced OTP macro incorporates eMemory’s proprietary physical unclonable function (PUF). The PUF feature provides additional value of data protection and anchors the IC’s root of trust into the silicon. At the operational level, the temperature tolerance extends up to 150°C, covering a wider range of supply voltages.

"Along with TSMC’s outstanding semiconductor manufacturing capabilities, eMemory’s new milestone on the N4P process ushers in more powerful and flexible NVM and security solutions for HPC, AI, Cloud Server, and mobile applications. Our goal is to lead the innovation of NVM technology and serve our mutual customers in this rapid-evolving era," said Chris Lu, Senior Vice President of Business Development of eMemory.

“Our latest collaboration with eMemory provides customers with qualified design solutions that allow them to fully leverage the significant performance boost of TSMC’s advanced process technologies,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “We will continue to work closely with our Open Innovation Platform® (OIP) ecosystem partners to help customers address the stringent design challenges and unleash next-generation HPC and mobile innovations.”

eMemory expects to complete qualification on the TSMC N5A process for automotive applications by the first quarter of 2024. The N3P project is currently under development and is scheduled to tape out in the first quarter of 2024.

Through close collaboration with TSMC in design solution development for advanced process technologies, eMemory remains committed to the best security-enhanced OTP and security solutions for various application trends, including smartphones, HPC, mobile, AI, automotive, and Cloud server.

About eMemory

eMemory (TPEX:3529) is a leading pure-play developer and provider of logic-based Non-Volatile Memory (Logic NVM) founded in 2000, and since 2019, eMemory started to offer PUF-based Security IP solutions based on its outstanding anti-fuse and physical unclonable function (PUF) technology. Following the breakthrough success of one-time programmable memories (NeoBit/NeoFuse), eMemory expanded its portfolio of IPs, including multi-time programmable memories (NeoMTP/NeoEE), Flash memories (NeoFlash), and PUF technology (NeoPUF). Additionally, with the subsidiary, PUFsecurity Corp., eMemory enters the security sector by offering innovative PUF-based security subsystems and solutions, such as Root of Trust Module PUFrt and Crypto Coprocessor PUFcc. As a world-leading IP provider, eMemory has delivered best-in-class designs to over 2,400 foundries, IDMs and fabless companies globally, and commits to push the technology envelope together with our partners in advanced applications.

For more information about eMemory, please visit www.ememory.com.tw

PR Contact

eMemory Digital Marketing Division

Erin Lee

+886-3-5601168 x1712

Email Contact

Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Upcoming Events
Phil Kaufman Award Ceremony and Banquet to be held November 6 at Hayes Mansion at Hayes Mansion 200 Edenvale Ave San Jose CA - Nov 6, 2024
SEMICON Europa 2024 at Messe München München Germany - Nov 12 - 15, 2024
DVCon Europe 2023 at Holiday Inn Munich – City Centre Munich Germany - Nov 14 - 15, 2024
SEMI MEMS & Imaging Sensors Summit, at International Conference Center Munich Germany - Nov 14, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise