Avery Design Systems, a leader in functional verification solutions, today announced a new validation suite supporting the Compute Express Link™ (CXL™) open industry-standard interconnect. It enables rapid and thorough system interoperability, validation and performance benchmarking of systems targeting the full range of versions of the CXL standard, including 1.1, 2.0 and 3.0. The comprehensive validation suite covers both pre-silicon virtual and post-silicon system platforms and extends Avery’s leadership in enabling designs incorporating industry-standard protocols for high-speed interconnect.

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About Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential backtracing; and robust core-through-chip-level Verification IP for PCI Express, CXL, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.

Compute Express Link and CXL are trademarks of the CXL Consortium

PCI Express and PCIe® are trademarks of PCI-SIG

Source:  Avery Design Systems

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