ELK GROVE, Calif., March 01, 2023 (GLOBE NEWSWIRE) -- Accellera Systems Initiative (Accellera) announced today that Phil Moorby, the inventor of the Verilog Hardware Description Language (HDL) who passed away in September 2022, is honored posthumously with the Accellera 2023 Technical Excellence Award. The award was established to recognize the outstanding achievements of an individual and their significant contributions to the development of its standards.
Mr. Moorby invented Verilog HDL in 1984 and developed the industry standard simulator Verilog-XL. His continued work to improve Verilog led to the SystemVerilog standard. He was honored with many awards for his work, including the prestigious Phil Kaufman Award in 2005. He also received a Fellow Award from the Computer History Museum in 2016 for his invention and the promotion of Verilog HDL.
“Phil Moorby invented and evolved the Verilog language, which has become the mainstay for the design of devices we all use every day,” stated Martin Barnasconi, Accellera Technical Committee Chair. “He was a mentor to SystemVerilog developers around the globe and his technical contributions and dedication to the industry have left an overarching impact that is beyond measure.”
Mr. Moorby was a British engineer and computer scientist. He studied Mathematics at Southhampton University in England and received his master’s degree in computer science from Manchester University in England. He moved to the United States in 1983. Mr. Moorby passed away on September 15, 2022 at the age of 69 in Rockport, MA.
About the Accellera Technical Committee
Accellera's Technical Committee oversees 15 active working groups that produce effective and efficient Electronic Design Automation (EDA) and Intellectual Property (IP) standards for today’s advanced electronic integrated circuits and embedded systems. Working group participants contribute to the development of standards for the electronics and semiconductor industry. Technical contributors typically have many years of practical experience in standardization of methodologies and languages for system-level design, integration, verification, or automation. For a list of Accellera working groups, please
click here.
About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit
www.accellera.org. Find out more about
membership. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are: Cadence, Siemens EDA, and Synopsys.
About DVCon U.S.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by
Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, Accellera also sponsors events in China, Europe, India and Japan in addition to DVCon U.S. For more information about DVCon U.S., please visit
www.dvcon.org. Follow DVCon U.S. on
Facebook, on
LinkedIn or @dvcon_us on Twitter, or to comment on Twitter, please use #dvcon_us.
Accellera, Accellera Systems Initiative, and DVCon and are trademarks of Accellera Systems Initiative Inc. A list of relevant Siemens trademarks can be found here. All other trademarks and trade names are the property of their respective owners.
For more information, contact:
Barbara Benjamin
Public Relations for Accellera Systems Initiative
Phone: +1 503 209 2323
Email: barbara@hipcom.com
