May 18, 2021 - Laguna Hills, CA -- Excellicon Inc. an innovative provider of comprehensive end-to-end timing constraints platform, announces its latest product “ConTree” for analyzing the clock structure and for guiding the design of the Clock Tree.
ConTree is intended to help RTL and Implementation engineers with the clock design in order to minimize debugging effort and to understand the clock network and topology. Implementation engineers can use this product to define the CTS timing constraints and to eliminate unnecessary CTS iterations.
Prior to running automated CTS tools, ConTree provides a detailed visual analysis of clock logic, topology and waveforms, in order to understand the clock propagation across the SOC. User can automatically visualize the entire clock network, with flexibility to interactively manage logical and physical hierarchies, combinational logic etc., in order to simplify the clocking diagram for easy readability and documentation. ConTree can also be used to detect intended or unintended changes in the clock network during the RTL evolution.
Additionally, the tool can be used to guide the designer in setting up the CTS spec file. As an example, ConTree also provides analysis of skew groups and exceptions relevant to the clock tree synthesis. The product is also used to run post-CTS verification, where it verifies the clock tree using the netlist, DEF, UPF and the SDC.
In this mode, the tool provides capabilities to check the CTS implementation across power domains, balancing issues, DRC’s, clock tree exceptions, mode conflicts, and validation of any SDC associated with CTS.
“Clock design and understanding the clock network for all modes and across different engineering teams, is tedious, error prone and consumes a significant amount of time before finalizing the clocking. ConTree can be used to streamline this process and further be used to reduce the number of iterations involved in design of clock tree while ensuring best performance, power and area of the clock network”, said Himanshu Bhatnagar, CEO of Excellicon. “We believe with our latest offering of ConTree, we further complete our coverage of clock analysis, verification and generation in order to achieve faster design closure. Excellicon technical papers will further discuss the details of the applications and examples of tool usage”.
ConTree is now available to our customers and provides a significant addition to ConCert and ConMan products.
About Excellicon
Excellicon is an innovative provider of comprehensive end-to-end Timing Constraints Analysis and Debugging solutions for the automation of constraints authoring, completion, and validation from RTL to GDS with innovative analysis and debugging infrastructures. Excellicon products ConMan (Constraints discovery & Promotion), ConCert (Constraints Verification), ConCert-ET (Exceptions Toolbox), and ConCert-BT (Budgeting ToolBox), ConCert-TEC (Timing Equivalence) and ConTree, address the needs of designers at every stage of SOC design and timing closure and implementation in a unified environment. – Timing Closure; Done Once! Done Right!
For further information contact:
Rick Eram
