Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies

Physical verification flow optimized for mobile and hyperscale advanced-node design development

SAN JOSE, Calif. — (BUSINESS WIRE) — April 19, 2021 — Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence® Pegasus Verification System has achieved certification for Samsung Foundry’s 5nm and 7nm process technologies. Through the collaboration with Samsung Foundry, the Cadence physical verification flow has been optimized to enable customers using Samsung Foundry’s advanced nodes to reach signoff accuracy and runtime goals in a variety of market areas, including the mobile and hyperscale markets. Samsung Foundry also delivered an enhanced, signoff-accurate process design kit (PDK) to facilitate the adoption of the Pegasus Verification System on the Samsung 5nm and 7nm technologies.

The Pegasus Verification System offers many advantages for engineers creating designs using Samsung’s advanced nodes. It provides massive scalability, which leads to faster turnaround times and more predictable design cycle times with design rule checks (DRCs), layout versus schematic (LVS), hierarchical metal fill (HMF) insertion and design-for-manufacturing (DFM) signoff. It has been validated with the Cadence Innovus Implementation System, providing improved productivity with signoff-level checks through implementation. Designers can easily fulfill mandatory DFM signoff requirements by leveraging integrated hotspot detection with seamless automated fixing. Additionally, the Pegasus Verification System features a tight, interactive integration with the Cadence Virtuoso® Layout Suite environment. For more information on the Pegasus Verification System, please visit www.cadence.com/go/pegasusadvnd.

“We value our collaboration with Cadence and have worked diligently to enable our mutual customers to sign off their designs using the Pegasus Verification System and Samsung Foundry’s advanced-node process technologies,” said Jong-Wook Kye, vice president of the Design Enablement Team at Samsung Electronics. “Through the certification process, we’re enabling our mutual customers to simultaneously improve power, performance and area and accelerate their design cycles to handle extreme market pressures. We also found that the Pegasus Verification System provided massive scalability for faster iterations, which lets customers focus on improving design closure.”

“The Pegasus system was architected from the ground up to accelerate the signoff physical verification flow through its massively parallel capabilities and integration into our Virtuoso environment and Innovus Implementation System,” said Michael Jackson, corporate vice president, R&D in the Digital & Signoff Group at Cadence. “This allows our customers to define and meet design schedules with greater predictability. We appreciate our continued collaboration with Samsung Foundry, which is critical to ensure our customers are confident using our signoff flow on Samsung’s advanced 5nm and 7nm process technologies.”

The Pegasus Verification System is part of the broader Cadence digital flow, which provides better predictability and a faster path to design closure and supports Cadence’s Intelligent System Design strategy, enabling SoC design excellence.

About Cadence

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2021 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.



Contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

Featured Video
Jobs
GPU Design Verification Engineer for AMD at Santa Clara, California
Senior Platform Software Engineer, AI Server - GPU for Nvidia at Santa Clara, California
Sr. Silicon Design Engineer for AMD at Santa Clara, California
CAD Engineer for Nvidia at Santa Clara, California
Senior Firmware Architect - Server Manageability for Nvidia at Santa Clara, California
Design Verification Engineer for Blockwork IT at Milpitas, California
Upcoming Events
SEMICON Japan 2024 at Tokyo Big Sight Tokyo Japan - Dec 11 - 13, 2024
PDF Solutions AI Executive Conference at St. Regis Hotel San Francisco - Dec 12, 2024
DVCon U.S. 2025 at United States - Feb 24 - 27, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise